SN65LBC176A
- Designed for signaling rates(1) up to 30 Mbps
- Bus-Pin ESD protection exceeds 12 kV HBM
- Compatible with ANSI standard TIA/EIA-485-A and ISO 8482:1987(E)
- Low Skew
- Designed for multipoint transmission on long bus lines in noisy environments
- Very low disabled supply-current requirements: 700 mA maximum
- Common mode voltage range of –7 V to 12 V
- Thermal-shutdown protection
- Driver positive and negative current limiting
- Open-circuit failsafe receiver design
- Receiver input sensitivity: ±200 mV Maximum
- Receiver input hysteresis: 50 mV typical
- Glitch-free power-up and power-down protection
- Available in Q-temp automotive
- High reliability automotive applications
- Configuration control / print support
- Qualification to automotive standards
(1)Signaling rate by TIA/EIA-485-A definition restrict transition times to 30% of the bit duration, and much higher signaling rates may be achieved using a different criteria (see the Typical Characteristics section).
The SN65LBC176A, SN65LBC176AQ, and SN75LBC176A differential bus transceivers are monolithic, integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. They are designed for balanced transmission lines and are compatible with ANSI standard TIA/EIA-485-A and ISO 8482. The A version offers improved switching performance over its predecessors without sacrificing significantly more power.
The SN65LBC176A, SN65LBC176AQ, and SN75LBC176A combine a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can externally connect together to function as a direction control. The driver differential outputs and the receiver differential inputs connect internally to form a differential input /output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. Very low device supply current can be achieved by disabling the driver and the receiver.
관심 가지실만한 유사 제품
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | SNx5LBC176A, Differential Bus Transceivers datasheet (Rev. G) | PDF | HTML | 2023/02/06 |
| Application note | Overtemperature Protection in RS-485 Line Circuits | 2006/04/21 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
RS485-HF-DPLX-EVM — RS-485 하프 듀플렉스 평가 모듈
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 착수하기 (...)
TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| PDIP (P) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.