The ADS1287 device is a low-power, analog-to-digital converter (ADC), with an integrated
programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is
suitable for the demanding needs of seismic equipment requiring precision digitizing with low power
consumption.
The ADC features a programmable-gain, high-impedance complementary metal oxide
semiconductor (CMOS) amplifier, suitable for direct connection of geophone and hydrophone sensors
to the ADC over a wide range of input signals (±2.5 V to ±0.156 V).
The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The
modulator digital output is filtered and decimated by the internal FIR digital filter to yield the
ADC conversion result.
The FIR digital filter provides data rates up to 1000 samples per second (SPS). The
high-pass filter (HPF) removes DC and low frequency components from the conversion result. On-chip
gain and offset scaling registers support system calibration.
Together, the amplifier, modulator, and digital filter dissipate 4.5 mW in
high-resolution mode (2.4 mW in low-power mode). The ADC is packaged in a compact 5-mm × 4-mm VQFN
package. The ADC is fully specified over the –40°C to +85°C temperature range.
The ADS1287 device is a low-power, analog-to-digital converter (ADC), with an integrated
programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is
suitable for the demanding needs of seismic equipment requiring precision digitizing with low power
consumption.
The ADC features a programmable-gain, high-impedance complementary metal oxide
semiconductor (CMOS) amplifier, suitable for direct connection of geophone and hydrophone sensors
to the ADC over a wide range of input signals (±2.5 V to ±0.156 V).
The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The
modulator digital output is filtered and decimated by the internal FIR digital filter to yield the
ADC conversion result.
The FIR digital filter provides data rates up to 1000 samples per second (SPS). The
high-pass filter (HPF) removes DC and low frequency components from the conversion result. On-chip
gain and offset scaling registers support system calibration.
Together, the amplifier, modulator, and digital filter dissipate 4.5 mW in
high-resolution mode (2.4 mW in low-power mode). The ADC is packaged in a compact 5-mm × 4-mm VQFN
package. The ADC is fully specified over the –40°C to +85°C temperature range.