ADC34RF55
- 14-Bit, quad channel 3-GSPS ADC
- Max output rate: 1.5-GSPS
- Noise spectral density:
- -156 dBFS/Hz without averaging
- -158 dBFS/Hz with 2x averaging
- Single core (non-interleaved) ADC architecture
- Aperture jitter: 50 fs
- Low close-in residual phase noise:
- -127 dBc/Hz at 10 kHz offset
- Spectral performance (f IN = 0.9 GHz, -4 dBFS):
- 2x internal averaging
- SNR: 62.3 dBFS
- SFDR HD2,3: 63 dBc
- SFDR worst spur: 85 dBFS
- Spectral performance (f IN = 1.8 GHz, -4 dBFS):
- 2x internal averaging
- SNR: 63 dBFS
- SFDR HD2,3: 68 dBc
- SFDR worst spur: 86 dBFS
- Input full scale: 1.1, 1.35 Vpp (2, 3.5 dBm)
- Code error rate (CER): 10 -15
- Full power input bandwidth (-3 dB): 2.75 GHz
- JESD204B serial data interface
- Maximum lane rate: 13 Gbps
- Supports subclass 1 deterministic latency
- Digital down-converters
- Up to two DDC per ADC channel
- Complex output: 4x to 128x decimation
- 48-bit NCO phase coherent frequency hopping
- Fast frequency hopping: < 1 µs
- Power consumption: 1.2 W/channel
- Power supplies: 1.8 V, 1.2 V
The ADC34RF55 is a single core 14-bit, 3-GSPS, quad channel analog to digital converters (ADC) that support RF sampling with input frequencies up to 3 GHz. The design maximizes signal-to-noise ratio (SNR), and delivers a noise spectral density of -156 dBFS/Hz. Using additional internal ADCs along with on-chip signal averaging, the noise density improves to -158 dBFS/Hz.
Each ADC channel can be connected to a dual-band digital down-converter (DDC) using a 48-bit NCO which supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping can be achieved in less than 1 µs.
The devices supports the JESD204B serial data interface with subclass 1 deterministic latency using data rates up to 13Gbps. There are only 2 serdes lanes per ADC channel. Therefore, in bypass mode, the maximum output data rate supported is 1.5GSPS. When using faster ADC sampling rates on chip, decimation is required.
The power efficient ADC architecture consumes 1.2W/ch and provides power scaling with lower sampling rates.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | ADC34RF55 Quad Channel 14-bit 3-GSPS RF Sampling Data Converter datasheet | PDF | HTML | 2023. 11. 1 | |
| 아날로그 디자인 학술지 | 고속 컨버터의 나이퀴스트 홀 주변 샘플 링 | PDF | HTML | Download English Version | 2025. 5. 23 | |
| 애플리케이션 노트 | Comparing Active vs. Passive High-Speed/RF A/D Converter Front Ends | PDF | HTML | 2025. 3. 28 | ||
| 애플리케이션 노트 | Evaluating High-Speed, RF ADC Converter Front-end Architectures | PDF | HTML | 2025. 3. 26 | ||
| 아날로그 디자인 학술지 | 테스트 및 측정 애플리케이션에서 RF 샘플링 데이터 컨버터의 빠른 주파수 호핑 살펴보기 | PDF | HTML | Download English Version | 2024. 9. 23 | |
| 애플리케이션 노트 | Improve SFDR Using Calibration in High-Speed ADCs | PDF | HTML | 2023. 6. 19 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
ADC32RF55EVM — ADC32RF55 - 낮은 NSD를 지원하는 듀얼 채널 14비트 3GSPS RF 샘플링 ADC용 평가 모듈
ADC32RF55EVM-GUI — ADC3xRF5xEVM GUI installer/configuration generator
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| VQFNP (RTD) | 64 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.