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UCC27528-Q1

AKTIV

Einkanal-Gate-Treiber, 5 A/5 A mit 5-V-UVLO und CMOS Eingängen, für die Automobil-Elektronik

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UCC27624-Q1 AKTIV Automobil-2-Kanal-Low-Side-Treiber, 30 V VDD, 5 A/5 A, 4-V-UVLO, geringe Ausbreitungsverzögerung This is a newer dual channel low-side driver with improved noise and transient handling.

UCC27528-Q1

AKTIV
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Produktdetails

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Negative Voltage Handling on Input Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Negative Voltage Handling on Input Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Device Temperature Grade 1
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold
    (Function of Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power Up and Power
    Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8 Package
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on
    Input Pins
  • Qualified for Automotive Applications
  • AEC-Q100 Device Temperature Grade 1
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold
    (Function of Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power Up and Power
    Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8 Package
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on
    Input Pins

The UCC27528-Q1 device is a dual-channel, high-speed, low-side gate driver capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27528-Q1 device can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay of 17 ns (typical). In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The enable pins are based on TTL and CMOS compatible logic, independent of the VDD supply voltage.

The UCC27528-Q1 device is a dual noninverting driver. Internal pullup and pulldown resistors on the input pins of the UCC27528-Q1 device ensure that outputs are held low when input pins are in floating condition. The UCC27528-Q1 device features enable pins (ENA and ENB) for better control of the operation of the driver applications. The pins are internally pulled up to the VDD supply for active-high logic and can be left open for standard operation.

The UCC27528-Q1 device is a dual-channel, high-speed, low-side gate driver capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27528-Q1 device can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay of 17 ns (typical). In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The enable pins are based on TTL and CMOS compatible logic, independent of the VDD supply voltage.

The UCC27528-Q1 device is a dual noninverting driver. Internal pullup and pulldown resistors on the input pins of the UCC27528-Q1 device ensure that outputs are held low when input pins are in floating condition. The UCC27528-Q1 device features enable pins (ENA and ENB) for better control of the operation of the driver applications. The pins are internally pulled up to the VDD supply for active-high logic and can be left open for standard operation.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt UCC27528-Q1 Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic datasheet (Rev. A) PDF | HTML 07.05.2015
Anwendungshinweis Why use a Gate Drive Transformer? PDF | HTML 04.03.2024
Anwendungshinweis Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22.01.2024
Anwendungshinweis Static Magnet Power Supply Design for Magnetic Resonance Imaging Application PDF | HTML 22.01.2024
Application brief External Gate Resistor Selection Guide (Rev. A) 28.02.2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28.02.2020
Anwendungshinweis Improving Efficiency of DC-DC Conversion through Layout 07.05.2019
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18.01.2019
Application brief High-Side Cutoff Switches for High-Power Automotive Applications (Rev. A) 26.11.2018
Weitere Dokumente Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29.10.2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16.03.2018

Design und Entwicklung

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