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DRV8329-Q1

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Dreiphasiger Gate-Treiber (60 V) für die Automobilindustrie mit einem Strommessverstärker

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Datenblatt

DRV8329-Q1

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Produktdetails

Rating Automotive Architecture Gate driver Control interface 3xPWM, 6xPWM Vs (min) (V) 4.5 Vs ABS (max) (V) 65 Features 1x low side current sense, Bootstrap Architecture for Gate Driver, HW based configuration, Supports 100% PWM Duty Cycle with Trickle Charge pump Operating temperature range (°C) -40 to 125
Rating Automotive Architecture Gate driver Control interface 3xPWM, 6xPWM Vs (min) (V) 4.5 Vs ABS (max) (V) 65 Features 1x low side current sense, Bootstrap Architecture for Gate Driver, HW based configuration, Supports 100% PWM Duty Cycle with Trickle Charge pump Operating temperature range (°C) -40 to 125
VQFN (RGF) 40 35 mm² (7 mm × 5 mm)
  • 65V Three Phase Half-Bridge Gate Driver
    • Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
    • 4.5 to 60V Operating Voltage Range
    • Supports 100% PWM Duty Cycle with Trickle Charge pump
  • Bootstrap based Gate Driver Architecture
    • 1000mA Maximum Peak Source Current
    • 2000mA Maximum Peak Sink Current
  • Integrated Current Sense Amplifier with low input offset (optimized for 1 shunt)
    • Adjustable Gain (5, 10, 20, 40V/V)
  • Hardware interface provides simple configuration
  • Ultra-low power sleep mode <1uA at 25 ̊C
  • 4ns (typ) propagation delay matching between phases
  • Independent driver shutdown path (DRVOFF)
  • 65V tolerant wake pin (nSLEEP)
  • Supports negative transients upto -10V on SHx
  • 6x and 3x PWM Modes
  • Supports 3.3V, and 5V Logic Inputs
  • Accurate LDO (AVDD), 3.3V ±3%, 80mA
  • Compact QFN Packages and Footprints
  • Adjustable VDS overcurrent threshold through VDSLVL pin
  • Adjustable deadtime through DT pin
  • Efficient System Design With Power Blocks
  • Integrated Protection Features
    • PVDD Undervoltage Lockout (PVDDUV)
    • GVDD Undervoltage (GVDDUV)
    • Bootstrap Undervoltage (BST_UV)
    • Overcurrent Protection (VDS_OCP, SEN_OCP)
    • Thermal Shutdown (OTSD)
    • Fault Condition Indicator (nFAULT)
  • 65V Three Phase Half-Bridge Gate Driver
    • Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
    • 4.5 to 60V Operating Voltage Range
    • Supports 100% PWM Duty Cycle with Trickle Charge pump
  • Bootstrap based Gate Driver Architecture
    • 1000mA Maximum Peak Source Current
    • 2000mA Maximum Peak Sink Current
  • Integrated Current Sense Amplifier with low input offset (optimized for 1 shunt)
    • Adjustable Gain (5, 10, 20, 40V/V)
  • Hardware interface provides simple configuration
  • Ultra-low power sleep mode <1uA at 25 ̊C
  • 4ns (typ) propagation delay matching between phases
  • Independent driver shutdown path (DRVOFF)
  • 65V tolerant wake pin (nSLEEP)
  • Supports negative transients upto -10V on SHx
  • 6x and 3x PWM Modes
  • Supports 3.3V, and 5V Logic Inputs
  • Accurate LDO (AVDD), 3.3V ±3%, 80mA
  • Compact QFN Packages and Footprints
  • Adjustable VDS overcurrent threshold through VDSLVL pin
  • Adjustable deadtime through DT pin
  • Efficient System Design With Power Blocks
  • Integrated Protection Features
    • PVDD Undervoltage Lockout (PVDDUV)
    • GVDD Undervoltage (GVDDUV)
    • Bootstrap Undervoltage (BST_UV)
    • Overcurrent Protection (VDS_OCP, SEN_OCP)
    • Thermal Shutdown (OTSD)
    • Fault Condition Indicator (nFAULT)

The DRV8329-Q1 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1A source and 2A sink. The DRV8329-Q1 can operate from a single power supply and supports a wide input supply range of 4.5 to 60V.

The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.

The DRV8329-Q1 devices integrate low-side current sense amplifier that allow current sensing for sum of current from all three phases of the drive stage.

A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.

The DRV8329-Q1 family of devices is an integrated gate driver for three-phase applications. The devices provide three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The device generates the correct gate drive voltages using an internal charge pump and enhances the high-side MOSFETs using a bootstrap circuit. A trickle charge pump is included to support 100% duty cycle. The Gate Drive architecture supports peak gate drive currents up to 1A source and 2A sink. The DRV8329-Q1 can operate from a single power supply and supports a wide input supply range of 4.5 to 60V.

The 6x and 3x PWM modes allow for simple interfacing to controller circuits. The device has integrated accurate 3.3V LDO that can be used to power external controller and can be used as reference for CSA. The configuration settings for the device are configurable through hardware (H/W) pins.

The DRV8329-Q1 devices integrate low-side current sense amplifier that allow current sensing for sum of current from all three phases of the drive stage.

A low-power sleep mode is provided to achieve low quiescent current by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, GVDD fault, MOSFET overcurrent, MOSFET short circuit, and overtemperature. Fault conditions are indicated on nFAULT pin.
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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt DRV8329-Q1 4.5 to 60V Three-phase BLDC Gate Driver datasheet (Rev. A) PDF | HTML 15.11.2024
Application brief Understanding Gate Driver Slew Rate Control, MOSFET Switching Optimization and Protection Features (Rev. A) PDF | HTML 11.12.2025

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Evaluierungsplatine

DRV8329AEVM — DRV8329A Evaluierungsmodul für dreiphasigen BLDC-Gate-Treiber

Das DRV8329AEVM ist eine bürstenlose 3-phasige 30-A-Gleichstrom-Ansteuerungsstufe basierend auf dem DRV8329A-Gate-Treiber für BLDC-Motoren. Der DRV8329 enthält drei Dioden für den Bootstrap-Betrieb, ohne dass externe Dioden erforderlich sind. Das Gerät enthält einen Strom-Shunt-Verstärker für (...)

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