SN74LS126A 不推荐用于新设计
该产品会持续为现有客户提供。新设计应考虑替代产品。
open-in-new 比较替代产品
功能与比较器件相同,但引脚排列有所不同
SN74AHCT126 正在供货 具有 TTL 兼容型 CMOS 输入和三态输出的 4 通道、4.5V 至 5.5V 缓冲器 Voltage range 4.5V to 5.5V, average propagation delay 9ns, average drive strength 8mA
功能与比较器件相似
CD74HCT126 正在供货 具有 TTL 兼容型 CMOS 输入和三态输出的 4 通道、4.5V 至 5.5V 缓冲器 Voltage range 4.5V to 5.5V, average propagation delay 22ns, average drive strength 4mA

产品详情

Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 4 IOL (max) (mA) 24 Supply current (max) (µA) 22000 IOH (max) (mA) -2.6 Input type Bipolar Output type 3-State Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 4 IOL (max) (mA) 24 Supply current (max) (µA) 22000 IOH (max) (mA) -2.6 Input type Bipolar Output type 3-State Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8
  • Quad Bus Buffers
  • 3-State Outputs
  • Separate Control for Each Channel

The SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.

  • Quad Bus Buffers
  • 3-State Outputs
  • Separate Control for Each Channel

The SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G\ is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low.

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G\ is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low.

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类型 标题 下载最新的英语版本 日期
* 数据表 Quadruple Bus Buffers With 3-State Outputs 数据表 (Rev. A) 2002年 2月 6日

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训