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BQ2204A

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用于 4 SRAM 内存组的 SRAM 非易失性控制器 IC

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BQ2204A

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产品详情

Features 4-Bank SRAM, CMOS, Non-volatile controller, Write-protection Operating current (typ) (µA) 3000 Rating Catalog Vin (max) (V) 5.5 Operating temperature range (°C) -40 to 85
Features 4-Bank SRAM, CMOS, Non-volatile controller, Write-protection Operating current (typ) (µA) 3000 Rating Catalog Vin (max) (V) 5.5 Operating temperature range (°C) -40 to 85
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Power monitoring and switching for 3-volt battery-backup applications
  • Write-protect control
  • 2-input decoder for control of up to 4 banks of SRAM
  • 3-volt primary cell inputs
  • Less than 10ns chip-enable propagation delay
  • 5% or 10% supply operation
  • Power monitoring and switching for 3-volt battery-backup applications
  • Write-protect control
  • 2-input decoder for control of up to 4 banks of SRAM
  • 3-volt primary cell inputs
  • Less than 10ns chip-enable propagation delay
  • 5% or 10% supply operation

The CMOS bq2204A SRAM Non-volatile Controller Unit provides all necessary functions for converting up to four banks of standard CMOS SRAM into nonvolatile read/write memory.

A precision comparator monitors the 5V VCC input for an out-of-tolerance condi-tion. When out-of-tolerance is detected, the four conditioned chip-enable outputs are forced inactive to write-protect up to four banks of SRAM.

During a power failure, the external SRAMs are switched from the VCC supply to one of two 3V backup sup-plies. On a subsequent power-up, the SRAMs are write-protected until a power-valid condition exists.

During power-valid operation, a two-input decoder transparently selects one of up to four banks of SRAM.

The CMOS bq2204A SRAM Non-volatile Controller Unit provides all necessary functions for converting up to four banks of standard CMOS SRAM into nonvolatile read/write memory.

A precision comparator monitors the 5V VCC input for an out-of-tolerance condi-tion. When out-of-tolerance is detected, the four conditioned chip-enable outputs are forced inactive to write-protect up to four banks of SRAM.

During a power failure, the external SRAMs are switched from the VCC supply to one of two 3V backup sup-plies. On a subsequent power-up, the SRAMs are write-protected until a power-valid condition exists.

During power-valid operation, a two-input decoder transparently selects one of up to four banks of SRAM.
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类型 标题 下载最新的英语版本 日期
* 数据表 X4 SRAM Nonvolatile Controller Unit 数据表 1999年 9月 5日

设计和开发

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封装 引脚 下载
PDIP (N) 16 查看选项
SOIC (D) 16 查看选项
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包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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