64-pin (RGC) package image

ADS6445MRGCTEP 正在供货

四通道、14 位、125MSPS 模数转换器 (ADC)(增强型产品)

正在供货 custom-reels 定制 可提供定制卷带
等同于: V62/08628-01XE 该器件型号与上面所列的器件型号相同。您只能订购该器件型号的上述数量。

定价

数量 价格
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质量信息

等级 HiRel Enhanced Product
RoHS
REACH
引脚镀层/焊球材料 NIPDAU
MSL 等级/回流焊峰值温度 Level-3-260C-168 HR
质量、可靠性
和封装信息

包含信息:

  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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更多制造信息

包含信息:

  • 制造厂地点
  • 封装厂地点
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出口管制分类

*仅供参考

  • 美国 ECCN:3A001A2C

封装信息

封装 | 引脚 VQFN (RGC) | 64
工作温度范围 (°C) -55 to 125
包装数量 | 包装 250 | SMALL T&R

ADS6445-EP 的特性

  • Maximum Sample Rate: 125 MSPS
  • 14-Bit Resolution with No Missing Codes
  • Simultaneous Sample and Hold
  • 3.5-dB Coarse Gain and up to 6-dB Programmable
    Fine Gain for SFDR/SNR Trade-Off
  • Serialized LVDS Outputs with Programmable
    Internal Termination Option
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock
    Inputs and Amplitude Down to 400 mVPP
  • Internal Reference with External Reference Support
  • No External Decoupling Required for References
  • 3.3-V Analog and Digital Supply
  • 64-pin QFN Package (9 mm × 9 mm)
  • Feature Compatible Dual Channel Family

ADS6445-EP 的说明

The ADS6445/ADS6444 is a high performance 14 bit 125/105 MSPS quad channel A-D converter. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5 dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1 dB steps up to 6 dB.

The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1 Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies.

An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14 bit data from each channel. In addition to the serial data streams, the frame and bit clocks also are transmitted as LVDS outputs.

The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye openings and improve signal integrity, easing capture by the receiver.

The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary.

The ADS644X has internal references, but also can support an external reference mode. The device is specified over –55°C to 125°C operating junction temperature range.

定价

数量 价格
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包装方式

您可以根据器件数量选择不同的包装方式,包括完整卷带、定制卷带、剪切带、管装或托盘。

定制卷带是从整盘卷带上剪下来的具有连续长度的剪切带,是一种可以对特定数量提供产品批次及生产日期跟踪的包装方式。根据行业标准,使用黄铜垫片在剪切带两端各连接一个 18 英寸的引带和尾带,以直接送入自动组装机。涉及定制卷带的 TI 订单将包含卷带费用。

剪切带是从整盘卷带上剪下来的特定长度的编带。根据所申请器件数量的不同,TI 可能会使用多条剪切带或多个盒子进行包装。

TI 通常会根据库存情况选择将管装托盘器件以盒装或者管装或托盘形式发货。所有器件均会按照 TI 内部规定的静电放电和湿敏等级保护要求进行包装。

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可提供批次和生产日期代码选项

您可在购物车中添加器件数量以开始结算流程,并查看现有库存中可选择批次或生产日期代码的选项。

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