产品详情

Sample rate (max) (Msps) 80 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1000 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 300 Architecture Pipeline SNR (dB) 74.3 ENOB (bit) 12 SFDR (dB) 90 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 80 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1000 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 300 Architecture Pipeline SNR (dB) 74.3 ENOB (bit) 12 SFDR (dB) 90 Operating temperature range (°C) -40 to 85 Input buffer No
WQFN (RTV) 32 25 mm² 5 x 5
  • 1 GHz Full Power Bandwidth
  • Internal Reference and Sample-and-Hold Circuit
  • Low Power Consumption
  • Data Ready Output Clock
  • Clock Duty Cycle Stabilizer
  • Single +3.0V Supply Operation
  • Power-Down Mode
  • 32-pin WQFN Package, (5x5x0.8mm, 0.5mm pin-pitch)

Key Specifications

  • Resolution: 14 Bits
  • Conversion Rate: 80 MSPS
  • SNR (fIN = 170 MHz): 71 dBFS (typ)
  • SFDR (fIN = 170 MHz): 86 dBFS (typ)
  • Full Power Bandwidth: 1 GHz (typ)
  • Power Consumption: 300 mW (typ)

All trademarks are the property of their respective owners.

  • 1 GHz Full Power Bandwidth
  • Internal Reference and Sample-and-Hold Circuit
  • Low Power Consumption
  • Data Ready Output Clock
  • Clock Duty Cycle Stabilizer
  • Single +3.0V Supply Operation
  • Power-Down Mode
  • 32-pin WQFN Package, (5x5x0.8mm, 0.5mm pin-pitch)

Key Specifications

  • Resolution: 14 Bits
  • Conversion Rate: 80 MSPS
  • SNR (fIN = 170 MHz): 71 dBFS (typ)
  • SFDR (fIN = 170 MHz): 86 dBFS (typ)
  • Full Power Bandwidth: 1 GHz (typ)
  • Power Consumption: 300 mW (typ)

All trademarks are the property of their respective owners.

The ADC14C080 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC14C080 may be operated from a single +3.0V power supply and consumes low power.

A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14C080 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14C080 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.

The ADC14C080 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC14C080 may be operated from a single +3.0V power supply and consumes low power.

A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14C080 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14C080 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.

下载 观看带字幕的视频 视频

技术文档

star =有关此产品的 TI 精选热门文档
未找到结果。请清除搜索,并重试。
查看全部 2
类型 标题 下载最新的英语版本 日期
* 数据表 ADC14C080 14-Bit, 65/80 MSPS A/D Converter 数据表 (Rev. C) 2013年 4月 19日
用户指南 ADC14C105EB and ADC12C105EB Evaluation Board User Guide (Rev. A) 2013年 10月 11日

设计和开发

如需其他信息或资源,请查看下方列表,点击标题即可进入详情页面。

模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
封装 引脚数 下载
WQFN (RTV) 32 了解详情

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持与培训

视频