SLVS710C January   2007  – February 2017 TPS65050

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Operation of DCDC Converters
        1. 8.3.1.1 DCDC1 Converter
        2. 8.3.1.2 DCDC2 Converter
      2. 8.3.2  Power-Save Mode
      3. 8.3.3  Dynamic Voltage Positioning
      4. 8.3.4  Soft Start
      5. 8.3.5  100% Duty Cycle Low Dropout Operation
      6. 8.3.6  Undervoltage Lockout
      7. 8.3.7  Mode Selection
      8. 8.3.8  Enable
      9. 8.3.9  RESET
      10. 8.3.10 Push-Button ON-OFF (PB-ON-OFF)
      11. 8.3.11 Short-Circuit Protection
      12. 8.3.12 Thermal Shutdown
      13. 8.3.13 Low Dropout Voltage Regulators
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Setting
          1. 9.2.2.1.1 Converter 1 (DCDC1)
          2. 9.2.2.1.2 Converter 2 (DCDC2)
        2. 9.2.2.2 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.2.1 Inductor Selection
          2. 9.2.2.2.2 Output Capacitor Selection
          3. 9.2.2.2.3 Input Capacitor Selection
        3. 9.2.2.3 Low Drop Out Voltage Regulators (LDOs)
        4. 9.2.2.4 PB-ONOFF and Sequencing
        5. 9.2.2.5 RESET
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resource
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Features

  • Up To 95% Efficiency
  • Output Current for DC-DC Converters:
    • TPS65050, TPS65054: 2 × 0.6 A
    • TPS65051, TPS65052 and TPS65056: DCDC1 = 1 A; DCDC2 = 0.6 A
  • Output Voltages for DC-DC Converters
    • Externally Adjustable and Fixed Versions Available
    • Digital Voltage Selection for the DCDC2
  • VI Range for DC-DC Converters
    From 2.5 V to 6 V
  • 2.25-MHz Fixed-Frequency Operation
  • Power Save Mode at Light Load Current
  • 180° Out-of-Phase Operation
  • Output Voltage Accuracy in PWM Mode ±1%
  • Total Typical 32-μA Quiescent Current for Both DC-DC Converters
  • 100% Duty Cycle for Lowest Dropout
  • Two General-Purpose 400-mA, High PSRR LDOs
  • Two General-Purpose 200-mA, High PSRR LDOs
  • VI range for LDOs From 1.5 V to 6.5 V
  • Digital Voltage Selection for the LDOs

Applications

  • Cell Phones, Smart Phones
  • WLAN
  • PDAs, Pocket PCs
  • OMAP™ and Low-Power TMS320™ DSP Supply
  • Samsung S3C24xx Application Processor Supply
  • Portable Media Players

Description

The TPS6505x family of devices are integrated power-management ICs for applications powered by one Li-Ion or Li-Polymer cell, which require multiple power rails. The TPS6505x devices provide two highly efficient, 2.25-MHz step-down converters targeted at providing the core voltage and I/O voltage in a processor-based system. Both step-down converters enter a low-power mode at light load for maximum efficiency across the widest possible range of load currents. For low noise applications, the devices can be forced into fixed-frequency PWM mode by pulling the MODE pin high. The TPS6505x devices also integrate two 400-mA LDO and two 200-mA LDO voltage regulators. Each LDO operates with an input voltage range from 1.5 V to 6.5 V, allowing them to be supplied from one of the step-down converters or directly from the main battery.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS6505x VQFN (32) 4.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

TPS65050 TPS65051 TPS65052 TPS65054 TPS65056 fbd50_lvs710.gif

Revision History

Changes from B Revision (June 2015) to C Revision

  • Deleted package marking and package information from the Device Options table. See the Device and Documentation Support section for packaging informationGo
  • Replaced references to PowerPAD with thermal padGo
  • Updated the functional block diagrams Go
  • Specified the maximum dropout voltage for each LDO in the Low Dropout Voltage Regulators sectionGo
  • Changed the resistor labels of R3, R4, and R5 to R13, R14, and R15 in the RESET section and updated the RESET Circuit figureGo
  • Updated the Typical Characteristics and Application Curves sectionsGo
  • Added the Receiving Notification of Documentation Updates sectionGo
  • Changed the Electrostatic Discharge Caution statementGo

Changes from A Revision (August 2007) to B Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Changed graph in Figure 14: should be PF_IN and PB_OUT not PB_IN and /RESPWRONGo

Changes from * Revision (January 2007) to A Revision

  • Added quantities of 3000 parts to ordering information note Go
  • Added Output voltage range to absolute maximum ratings tableGo
  • Changed LDO1/2 Output voltage range maximum value to 3.6 VGo
  • Changed Output voltage 2.8-V R5 resistor value to 360 kΩ in typical resistor values tableGo