SCLA047 July   2021 SN74HCS244-Q1 , SN74LVC1G34


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  2.   Design Considerations
  3.   Recommended Parts

System controllers can have weak output drive strength and thus cannot be used to directly transmit over relatively high capacitance signal lines. A logic buffer can be added to reduce loading and improve signal integrity. This can be done at intervals on a bus or trace to improve signal integrity and data rates in particularly large systems.

Left: block diagrams for signal redriving. Right: simulated input (red) and output signals with weak controller (black) and typical buffer driver from the LVC logic family (purple).
Figure 1-1 Signal Redriving Block Diagrams; Simulated Waveforms