ZHCSUB0B January   2024  – December 2024 AWR2544

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
    1. 3.1 功能方框图
  5. 4 器件比较
  6. 5 相关产品
  7. 6 引脚配置和功能
    1. 6.1 引脚图
    2. 6.2 引脚属性
    3. 6.3 信号说明 - 数字
    4. 6.4 信号说明 - 模拟
  8. 7 规格
    1. 7.1  绝对最大额定值
    2. 7.2  ESD 等级
    3. 7.3  上电小时数 (POH)
    4. 7.4  建议运行条件
    5. 7.5  一次性可编程 (OTP) 电子保险丝的 VPP 规格
      1. 7.5.1 OTP 电子保险丝编程的建议运行条件
      2. 7.5.2 硬件要求
      3. 7.5.3 对硬件保修的影响
    6. 7.6  电源规格
    7. 7.7  功耗摘要
    8. 7.8  射频规格
    9. 7.9  热阻特性
    10. 7.10 电源时序和复位时序
    11. 7.11 输入时钟和振荡器
      1. 7.11.1 时钟规格
    12. 7.12 外设信息
      1. 7.12.1 QSPI 闪存存储器外设
        1. 7.12.1.1 QSPI 时序条件
        2. 7.12.1.2 QSPI 时序要求 #GUID-C38B9713-DC57-4B3B-8AFF-A79AF70E5A5A/GUID-97D19708-D87E-443B-9ADF-1760CFEF6F4C #GUID-C38B9713-DC57-4B3B-8AFF-A79AF70E5A5A/GUID-0A61EEC9-2B95-4C27-B219-18D27C8F9430
        3. 7.12.1.3 QSPI 开关特性 #GUID-D1480E86-4079-4A44-A68A-26C2D9F4506B/T4362547-64 #GUID-D1480E86-4079-4A44-A68A-26C2D9F4506B/T4362547-65
      2. 7.12.2 多缓冲/标准串行外设接口 (MibSPI)
        1. 7.12.2.1 MibSPI 外设说明
        2. 7.12.2.2 MibSPI 发送和接收 RAM 组织结构
          1. 7.12.2.2.1 SPI 时序条件
          2. 7.12.2.2.2 SPI 控制器模式开关参数（时钟相位 = 0、SPICLK = 输出、SPISIMO = 输出和 SPISOMI = 输入） #GUID-3DD8619F-41DB-47CF-9AF7-5916CFF97E61/T4362547-236 #GUID-3DD8619F-41DB-47CF-9AF7-5916CFF97E61/T4362547-237 #GUID-3DD8619F-41DB-47CF-9AF7-5916CFF97E61/T4362547-238
          3. 7.12.2.2.3 SPI 控制器模式开关参数（时钟相位 = 1、SPICLK = 输出、SPISIMO = 输出和 SPISOMI = 输入） #GUID-220CE6B8-D17E-48AF-BF69-AAEC97D55C95/T4362547-244 #GUID-220CE6B8-D17E-48AF-BF69-AAEC97D55C95/T4362547-245 #GUID-220CE6B8-D17E-48AF-BF69-AAEC97D55C95/T4362547-246
        3. 7.12.2.3 SPI 外设模式 I/O 时序
          1. 7.12.2.3.1 SPI 外设模式开关参数（SPICLK = 输入、SPISIMO = 输入和 SPISOMI = 输出） #GUID-BF2B230C-8F03-4C6A-A240-6DFD0CEC87C8/T4362547-70 #GUID-BF2B230C-8F03-4C6A-A240-6DFD0CEC87C8/T4362547-71 #GUID-BF2B230C-8F03-4C6A-A240-6DFD0CEC87C8/T4362547-73
      3. 7.12.3 以太网交换机 (RGMII/RMII/MII) 外设
        1. 7.12.3.1  RGMII/RMII/MII 时序条件
        2. 7.12.3.2  RGMII 发送时钟开关特性
        3. 7.12.3.3  RGMII 发送数据和控制开关特性
        4. 7.12.3.4  RGMII 接收时钟时序要求
        5. 7.12.3.5  RGMII RX 和 TX 时序图
        6. 7.12.3.6  RGMII 接收数据和控制时序要求
        7. 7.12.3.7  RMII 发送时钟开关特性
        8. 7.12.3.8  RMII 发送数据和控制开关特性
        9. 7.12.3.9  RMII 接收时钟时序要求
        10. 7.12.3.10 RMII 接收数据和控制时序要求
        11. 7.12.3.11 MII 发送开关特性
        12. 7.12.3.12 MII 接收时钟时序要求
        13. 7.12.3.13 MII 接收时序要求
        14. 7.12.3.14 MII 发送时钟时序要求
        15. 7.12.3.15 MDIO 接口时序
      4. 7.12.4 LVDS 仪表和测量外设
        1. 7.12.4.1 LVDS 接口配置
        2. 7.12.4.2 LVDS 接口时序
      5. 7.12.5 UART 外设
        1. 7.12.5.1 SCI 时序要求
      6. 7.12.6 内部集成电路接口 (I2C)
        1. 7.12.6.1 I2C 时序要求 #GUID-5F6D5D17-1161-44B3-ABD1-283215937B93/T4362547-185
      7. 7.12.7 增强型脉宽调制器 (ePWM)
      8. 7.12.8 通用输入/输出
        1. 7.12.8.1 输出时序的开关特性和负载电容间的关系 (CL) #GUID-918A19D2-41ED-481C-96AE-E1C69B8B3446/T4362547-45 #GUID-918A19D2-41ED-481C-96AE-E1C69B8B3446/T4362547-50
    13. 7.13 仿真和调试
      1. 7.13.1 仿真和调试说明
      2. 7.13.2 JTAG 接口
        1. 7.13.2.1 IEEE 1149.1 JTAG 的时序要求
        2. 7.13.2.2 IEEE 1149.1 JTAG 的开关特性
      3. 7.13.3 ETM 跟踪接口
        1. 7.13.3.1 ETM 跟踪时序要求
        2. 7.13.3.2 ETM 跟踪开关特性
  9. 8 详细说明
    1. 8.1 概述
    2. 8.2 功能方框图
    3. 8.3 子系统
      1. 8.3.1 射频 (RF) 和模拟子系统
        1. 8.3.1.1 射频时钟子系统
        2. 8.3.1.2 发送子系统
        3. 8.3.1.3 接收子系统
      2. 8.3.2 处理器子系统
      3. 8.3.3 汽车接口
    4. 8.4 其他子系统
      1. 8.4.1 硬件加速器子系统
      2. 8.4.2 安全性 – 硬件安全模块
      3. 8.4.3 用于用户应用的 ADC 通道（服务）
  10. 9 监控和诊断
    1. 9.1 监测和诊断机制
  11. 10应用、实现和布局
    1. 10.1 应用信息
    2. 10.2 短距离和中距离雷达
    3. 10.3 参考原理图
  12. 11器件和文档支持
    1. 11.1 器件支持
    2. 11.2 器件命名规则
    3. 11.3 工具与软件
    4. 11.4 文档支持
    5. 11.5 支持资源
    6. 11.6 商标
    7. 11.7 静电放电警告
    8. 11.8 术语表
  13. 12修订历史记录
  14. 13机械、封装和可订购信息

6.2 引脚属性

表 6-1 引脚属性（AMQ/FCCSP 封装）
焊球编号 焊球名称（默认） 多路复用器信号名称 MODE 类型 焊球复位状态 上拉/下拉类型
U3 MSS_MIBSPIB_CS1 MSS_GPIO_12 0 IO 输出禁用 PD
MSS_MIBSPIA_HOSTIRQ 1 O
ADC_VALID 2 O
RSVD 3 I
RSVD 4 O
RSVD 5 O
MSS_MIBSPIB_CS1 6 IO
U5 MSS_GPIO_0 MSS_GPIO_13 0 IO 输出禁用 PD
MSS_GPIO_0 1 IO
PMIC_CLKOUT 2 O
MSS_EPWM_TZ2 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 IO
RSVD 7 I
RSVD 8 O
RSVD 9 O
MSS_EPWMA1 10 O
MSS_EPWMB0 11 O
RSVD 12 IO
U4 MSS_GPIO_1 MSS_GPIO_16 0 IO 输出禁用 PD
MSS_GPIO_1 1 IO
SYNC_OUT 2 O
MSS_EPWM_TZ1 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 IO
BSS_UARTA_TX 7 O
READY_INT 8 O
LVDS_VALID 9 O
RSVD 10 O
RSVD 11 O
RSVD 12 IO
MSS_MIBSPIB_CS1 13 IO
RSVD 14 IO
MSS_EPWMA_SYNCI 15 I
T3 MSS_MIBSPIB_SDO MSS_GPIO_21 0 IO 输出禁用 PU
MSS_MIBSPIB_SDO 1 IO
MSS_I2CA_SDA 2 IO
MSS_EPWMA0 3 O
RSVD 4 O
RSVD 5 O
RSVD 6 I
RSVD 7 IO
U2 MSS_MIBSPIB_SDI MSS_GPIO_22 0 IO 输出禁用 PU
MSS_MIBSPIB_SDI 1 IO
MSS_I2CA_SCL 2 IO
MSS_EPWMB0 3 O
RSVD 4 O
RSVD 5 O
RSVD 6 IO
RSVD 7 IO
R1 MSS_MIBSPIB_CLK MSS_GPIO_5 0 IO 输出禁用 PU
MSS_MIBSPIB_CLK 1 IO
MSS_UARTA_RX 2 IO
MSS_EPWMC0 3 O
RSVD 4 O
RSVD 5 O
MSS_UARTB_TX 6 IO
BSS_UARTA_TX 7 O
RSVD 8 IO
T1 MSS_MIBSPIB_CS0 MSS_GPIO_4 0 IO 输出禁用 PU
MSS_MIBSPIB_CS0 1 IO
MSS_UARTA_TX 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
MSS_UARTB_TX 6 IO
BSS_UARTA_TX 7 O
RSVD 8 IO
RSVD 9 IO
U8 MSS_QSPI_0 MSS_GPIO_8 0 IO 输出禁用 PD
MSS_QSPI_0 1 IO
MSS_MIBSPIB_MISO 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 O
RSVD 7 O
U7 MSS_QSPI_1 MSS_GPIO_9 0 IO 输出禁用 PD
MSS_QSPI_1 1 I
MSS_MIBSPIB_MOSI 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 O
RSVD 7 O
MSS_MIBSPIB_CS2 8 IO
U6 MSS_QSPI_2 MSS_GPIO_10 0 IO 输出禁用 PU
MSS_QSPI_2 1 I
ADC_VALID 2 O
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 O
RSVD 7 O
RSVD 8 IO
T5 MSS_QSPI_3 MSS_GPIO_11 0 IO 输出禁用 PU
MSS_QSPI_3 1 I
ADC_VALID 2 O
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 O
RSVD 7 O
RSVD 8 IO
T7 MSS_QSPI_CLK MSS_GPIO_7 0 IO 输出禁用 PD
MSS_QSPI_CLK 1 IO
MSS_MIBSPIB_CLK 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 IO
T6 MSS_QSPI_CS MSS_GPIO_6 0 IO 输出禁用 PU
MSS_QSPI_CS 1 O
MSS_MIBSPIB_CS0 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
B17 WARM_RESET WARM_RESET 0 IO 高阻抗（开漏）
D17 NERROR_OUT NERROR_OUT 0 IO 高阻抗（开漏）
B6 TCK MSS_GPIO_17 0 IO 输出禁用 PD
TCK 1 I
MSS_UARTB_TX 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
BSS_UARTA_RX 6 I
RSVD 7 I
RSVD 8 IO
B5 TMS MSS_GPIO_18 0 IO 输出禁用 PU
TMS 1 IO
BSS_UARTA_TX 2 O
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 IO
B8 TDI MSS_GPIO_23 0 IO 输出禁用 PU
TDI 1 I
MSS_UARTA_RX 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 I
RSVD 7 IO
B7 TDO MSS_GPIO_24 0 IO 输出禁用 高阻态
TDO 1 O
MSS_UARTA_TX 2 IO
RSVD 3 I
RSVD 4 O
RSVD 5 O
MSS_UARTB_TX 6 IO
BSS_UARTA_TX 7 O
RSVD 8 O
RSVD 9 IO
A9 MCU_CLKOUT MSS_GPIO_25 0 IO 输出禁用 PD
MCU_CLKOUT 1 O
TRACE_CLK 2 O
RSVD 3 I
RSVD 4 O
RSVD 5 O
RSVD 6 I
FRAME_START 7 O
READY_INT 8 O
LVDS_VALID 9 O
BSS_UARTA_RX 10 I
RSVD 11 O
MSS_EPWMA0 12 O
RSVD 13 O
RSVD 14 IO
OBS_CLKOUT 15 O
T4 MSS_GPIO_2 MSS_GPIO_26 0 IO 输出禁用 PD
MSS_GPIO_2 1 IO
RSVD 2 O
RSVD 3 IO
RSVD 4 O
RSVD 5 O
RSVD 6 IO
MSS_UARTB_TX 7 IO
MSS_GPIO_2 8 IO
SYNC_OUT 9 O
PMIC_CLKOUT 10 O
CHIRP_START 11 O
CHIRP_END 12 O
FRAME_START 13 O
MSS_EPWM_TZ0 14 I
LVDS_VALID 15 O
B10 PMIC_CLKOUT MSS_GPIO_27 0 IO 输出禁用 高阻态
PMIC_CLKOUT 1 O
OBS_CLKOUT 2 O
TRACE_CTL 3 O
RSVD 4 O
RSVD 5 O
CHIRP_START 6 O
CHIRP_END 7 O
FRAME_START 8 O
READY_INT 9 O
LVDS_VALID 10 O
MSS_EPWMA1 11 O
MSS_EPWMB0 12 O
RSVD 13 IO
C17 HW_SYNCIN MSS_GPIO_28 0 IO 输出禁用 PD
HW_SYNCIN 1 I
ADC_VALID 2 O
RSVD 3 IO
RSVD 4 O
RSVD 5 O
MSS_UARTB_RX 6 IO
RSVD 7 IO
RSVD 8 IO
SYNC_OUT 9 O
T2 MSS_MIBSPIB_CS2 MSS_GPIO_29 0 IO 输出禁用 高阻态
SYNC_OUT 1 O
RCOSC_CLK 2 O
RSVD 3 IO
RSVD 4 O
RSVD 5 O
READY_INT 6 O
LVDS_VALID 7 O
RSVD 8 O
RSVD 9 IO
MSS_MIBSPIB_CS1 10 IO
MSS_MIBSPIB_CS2 11 IO
MSS_EPWMB0 12 O
MSS_EPWMB1 13 O
A11 MSS_RS232_RX MSS_GPIO_15 0 IO 输出禁用 PU
MSS_RS232_RX 1 IO
MSS_UARTA_RX 2 IO
RSVD 4 O
RSVD 5 O
BSS_UARTA_TX 6 O
MSS_UARTB_RX 7 IO
RSVD 8 IO
MSS_I2CA_SCL 9 IO
MSS_EPWMB0 10 O
MSS_EPWMB1 11 O
MSS_EPWMC0 12 O
A16 MSS_RS232_TX MSS_GPIO_14 0 IO 输出禁用 PU
MSS_RS232_TX 1 IO
RSVD 3 O
RSVD 4 O
MSS_UARTA_TX 5 IO
MSS_UARTB_TX 6 IO
BSS_UARTA_TX 7 O
READY_INT 8 O
LVDS_VALID 9 O
RSVD 10 IO
MSS_I2CA_SDA 11 IO
MSS_EPWMA0 12 O
MSS_EPWMA1 13 O
RSVD 14 IO
MSS_EPWMB0 15 O
A6 MSS_GPIO_31 TRACE_DATA_0 0 O 输出禁用 PD
MSS_GPIO_31 1 IO
RSVD 2 IO
RSVD 3 I
MSS_UARTA_TX 4 IO
RSVD 5 I
MSS_GPIO_31 6 IO
RSVD 7 IO
RSVD 8 I
RSVD 9 I
MSS_I2CA_SDA 10 IO
A10 MSS_GPIO_30 TRACE_DATA_1 0 O 输出禁用 PD
MSS_GPIO_30 1 IO
RSVD 2 IO
MSS_EPWMC_SYNCI 3 I
MSS_UARTA_RX 4 IO
RSVD 5 I
MSS_GPIO_0 6 IO
RSVD 7 IO
RSVD 8 I
RSVD 9 I
MSS_I2CA_SCL 10 IO
B9 MSS_GPIO_8 TRACE_DATA_2 0 O 输出禁用 PD
MSS_GPIO_29 1 IO
RSVD 2 IO
MSS_EPWMB_SYNCI 3 I
RSVD 4 I
RSVD 5 I
MSS_GPIO_1 6 IO
MSS_GPIO_8 7 IO
MSS_EPWMA0 8 O
MSS_CPTS0_TS_GENF0 9 O
CHIRP_START 10 O
CHIRP_END 11 O
FRAME_START 12 O
READY_INT 13 O
ADC_VALID 14 O
B11 MSS_GPIO_9 TRACE_DATA_3 0 O 输出禁用 PD
MSS_GPIO_28 1 IO
RSVD 2 IO
RSVD 3 I
MSS_EPWMC_SYNCO 4 O
RSVD 5 I
MSS_GPIO_2 6 IO
MSS_GPIO_9 7 IO
MSS_EPWMA1 8 O
MSS_CPTS0_TS_GENF1 9 O
CHIRP_START 10 O
CHIRP_END 11 O
FRAME_START 12 O
READY_INT 13 O
ADC_VALID 14 O
A7 MSS_GPIO_3 TRACE_DATA_4 0 O 输出禁用 PD
MSS_GPIO_3 1 IO
RSVD 2 IO
RSVD 3 I
MSS_EPWMB_SYNCO 4 O
RSVD 5 I
MSS_GPIO_27 6 IO
MSS_EPWMB0 7 O
MSS_CPTS0_TS_GENF2 8 O
XREF_CLK1 9 I
MSS_CPTS0_TS_GENF1 10 O
MSS_CPTS0_HW1TSPUSH 11 I
ADC_VALID 12 O
A8 MSS_GPIO_4 TRACE_DATA_5 0 O 输出禁用 PD
MSS_GPIO_4 1 IO
RSVD 2 IO
RSVD 3 I
MSS_EPWM_TZ2 4 I
MSS_UARTB_TX 5 IO
MSS_GPIO_26 6 IO
MSS_EPWMB1 7 O
MSS_CPTS0_TS_COMP 8 O
XREF_CLK0 9 I
MSS_CPTS0_HW2TSPUSH 10 I
READY_INT 11 O
B18 BSS_UARTA_TX TRACE_DATA_6 0 O 输出禁用 PD
MSS_GPIO_5 1 IO
RSVD 2 IO
RSVD 3 I
MSS_EPWM_TZ1 4 I
BSS_UARTA_TX 5 O
MSS_GPIO_25 6 IO
MSS_GPIO_10 7 IO
MSS_EPWMC0 8 O
MSS_CPTS0_TS_GENF2 9 O
MSS_CPTS0_HW1TSPUSH 10 I
CHIRP_START 11 O
A17 MSS_GPIO_11 TRACE_DATA_7 0 O 输出禁用 PD
MSS_GPIO_6 1 IO
RSVD 2 IO
RSVD 3 I
MSS_EPWM_TZ0 4 I
RSVD 5 IO
MSS_GPIO_24 6 IO
MSS_GPIO_11 7 IO
MSS_EPWMC1 8 O
MSS_CPTS0_TS_COMP 9 O
MSS_CPTS0_TS_GENF0 10 O
MSS_CPTS0_HW2TSPUSH 11 I
CHIRP_END 12 O
T13 MSS_GPIO_17 MSS_GPIO_17 0 IO 输出禁用 PD
MSS_MII_COL 1 I
MSS_RMII_REFCLK 2 IO
RSVD 3 I
RSVD 4 IO
RSVD 5 I
MSS_EPWMA1 6 O
T12 MSS_I2CA_SDA MSS_GPIO_18 0 IO 高阻态
MSS_MII_CRS 1 I
MSS_RMII_CRS_DV 2 I
MSS_I2CA_SDA 3 IO
RSVD 4 IO
RSVD 5 I
MSS_EPWMB1 6 O
R12 MSS_I2CA_SCL MSS_GPIO_19 0 IO 高阻态
MSS_MII_RXER 1 I
MSS_RMII_RXER 2 I
MSS_I2CA_SCL 3 IO
RSVD 4 IO
RSVD 5 I
MSS_EPWMC1 6 O
M17 MSS_RGMII_TCTL MSS_GPIO_20 0 IO 输出禁用 PD
MSS_MII_TXEN 1 O
MSS_RMII_TXEN 2 O
MSS_RGMII_TCTL 3 O
RSVD 4 IO
RSVD 5 I
MSS_EPWMA0 6 O
U16 MSS_RGMII_RCTL MSS_GPIO_21 0 IO 高阻态
MSS_MII_RXDV 1 I
RSVD 2 I
MSS_RGMII_RCTL 3 I
MSS_UARTB_RX 5 IO
MSS_EPWMB0 6 O
N17 MSS_RGMII_TD3 MSS_GPIO_22 0 IO 输出禁用 PD
MSS_MII_TXD3 1 O
RSVD 2 I
MSS_RGMII_TD3 3 O
RSVD 4 IO
MSS_UARTB_TX 5 IO
MSS_EPWMC0 6 O
T18 MSS_RGMII_TD2 MSS_GPIO_23 0 IO 输出禁用 PD
MSS_MII_TXD2 1 O
RSVD 2 I
MSS_RGMII_TD2 3 O
P17 MSS_RGMII_TD1 MSS_GPIO_24 0 IO 输出禁用 PD
MSS_MII_TXD1 1 O
MSS_RMII_TXD1 2 O
MSS_RGMII_TD1 3 O
R17 MSS_RGMII_TD0 MSS_GPIO_25 0 IO 输出禁用 PD
MSS_MII_TXD0 1 O
MSS_RMII_TXD0 2 O
MSS_RGMII_TD0 3 O
T17 MSS_RGMII_TCLK MSS_GPIO_26 0 IO 输出禁用 PD
MSS_MII_TXCLK 1 I
RSVD 2 I
MSS_RGMII_TCLK 3 O
U15 MSS_RGMII_RCLK MSS_GPIO_27 0 IO 输出禁用 PD
MSS_MII_RXCLK 1 I
RSVD 2 I
MSS_RGMII_RCLK 3 I
U17 MSS_RGMII_RD3 MSS_GPIO_28 0 IO 高阻态
MSS_MII_RXD3 1 I
RSVD 2 I
MSS_RGMII_RD3 3 I
R16 MSS_RGMII_RD2 MSS_GPIO_29 0 IO 高阻态
MSS_MII_RXD2 1 I
RSVD 2 I
MSS_RGMII_RD2 3 I
T16 MSS_RGMII_RD1 MSS_GPIO_30 0 IO 高阻态
MSS_MII_RXD1 1 I
MSS_RMII_RXD1 2 I
MSS_RGMII_RD1 3 I
T15 MSS_RGMII_RD0 MSS_GPIO_31 0 IO 高阻态
MSS_MII_RXD0 1 I
MSS_RMII_RXD0 2 I
MSS_RGMII_RD0 3 I
T14 MSS_MDIO_DATA MSS_GPIO_30 0 IO 输出禁用 PU
MSS_MDIO_DATA 1 IO
RSVD 2 I
RSVD 3 I
U14 MSS_MDIO_CLK MSS_GPIO_31 0 IO 输出禁用 PU
MSS_MDIO_CLK 1 O
RSVD 2 I
RSVD 3 I
P1 MSS_UARTA_RX MSS_GPIO_12 0 IO 输出禁用 PU
MSS_CPTS0_TS_SYNC 1 O
RSVD 2 I
MSS_GPIO_8 3 IO
MSS_UARTB_RX 4 IO
MSS_UARTA_RX 5 IO
RSVD 6 IO
R2 MSS_UARTA_TX MSS_GPIO_13 0 IO 高阻态
MSS_CPTS0_HW2TSPUSH 1 I
RSVD 2 I
MSS_GPIO_9 3 IO
MSS_UARTB_TX 4 IO
MSS_UARTA_TX 5 IO
RSVD 6 IO
P2 MSS_UARTB_TX MSS_GPIO_0 0 IO 高阻态
RSVD 1 IO
RSVD 2 I
MSS_EPWMB_SYNCI 3 I
RSVD 4 IO
MSS_UARTA_TX 5 IO
MSS_UARTB_TX 6 IO
RSVD 7 I
LVDS_VALID 8 O
RSVD 9 I
RSVD 10 I
RSVD 11 I
MSS_GPIO_31 12 IO