ZHCSPZ0A february   2022  – june 2023 LMK1D1208I

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Parameter Measurement Information
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fail-Safe Input
      2. 9.3.2 Input Stage Configurability
      3. 9.3.3 Dual Output Bank
      4. 9.3.4 I2C
        1. 9.3.4.1 I2C Address Assignment
      5. 9.3.5 LVDS Output Termination
      6. 9.3.6 Input Termination
    4. 9.4 Device Functional Modes
      1. 9.4.1 Input Enable Control
      2. 9.4.2 Bank Input Selection
      3. 9.4.3 Bank Mute Control
      4. 9.4.4 Output Enable Control
      5. 9.4.5 Output Amplitude Selection
    5. 9.5 Programming
    6. 9.6 Register Maps
      1. 9.6.1 LMK1D1208I Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
    2. 12.2 Tape and Reel Information

LVDS Output Termination

TI recommends that unused outputs are terminated differentially with a 100-Ω resistor for optimum performance. Unterminated outputs are also okay, but this will result in a slight degradation in performance (Output AC common-mode VOS) in the outputs being used.

Figure 9-1 and Figure 9-2 show how the LMK1D1208I can be connected to LVDS receiver inputs with DC and AC coupling, respectively.

GUID-A24A066A-86C6-48C7-9385-35E7BCA25949-low.gifFigure 9-1 Output DC Termination
GUID-8225055B-3CF7-47D6-864A-5307BAEED1F6-low.gifFigure 9-2 Output AC Termination (With the Receiver Internally Biased)