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  • TPS63901 采用 WCSP 封装、具有输入电流限制和 DVS 的 1.8V 至 5.5V、75nA IQ 降压/升压转换器

    • ZHCSNV8B December   2021  – August 2024 TPS63901

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  • TPS63901 采用 WCSP 封装、具有输入电流限制和 DVS 的 1.8V 至 5.5V、75nA IQ 降压/升压转换器
  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Trapezoidal Current Control
      2. 6.3.2 Device Enable and Disable
      3. 6.3.3 Soft Start
      4. 6.3.4 Input Current Limit
      5. 6.3.5 Dynamic Voltage Scaling
      6. 6.3.6 Device Configuration (Resistor-to-Digital Interface)
      7. 6.3.7 SEL Pin
      8. 6.3.8 Short-Circuit Protection
        1. 6.3.8.1 Current Limit Setting = 'Unlimited'
        2. 6.3.8.2 Current Limit Setting = 1 mA to 100 mA
      9. 6.3.9 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Inductor Selection
        2. 7.2.2.2 Output Capacitor Selection
        3. 7.2.2.3 Input Capacitor Selection
        4. 7.2.2.4 Setting The Output Voltage
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 接收文档更新通知
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
  14. 重要声明
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Data Sheet

TPS63901 采用 WCSP 封装、具有输入电流限制和 DVS 的 1.8V 至 5.5V、75nA IQ 降压/升压转换器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

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1 特性

  • 输入电压范围为 1.8V 至 5.5V
  • 1.8V 至 5V 输出电压范围（100mV 阶跃）
    • 可使用外部电阻器进行编程
    • SEL 引脚用于在两个输出电压预设之间切换
  • VI ≥ 2.0V、VO = 3.3V 时，输出电流大于 400mA
    • 可堆叠：并联多个器件以获得更高的输出电流
  • 负载电流为 10µA 时，效率 > 90%
    • 静态电流为 75nA
    • 60nA 关断电流
  • 单模式运行
    • 无需在降压、降压/升压和升压模式之间转换
    • 低输出波纹
    • 出色的瞬态性能
  • 可靠运行的特性
    • 集成软启动
    • 可编程输入电流限制，具有八个设置（1mA 至 100mA 和无限制）
    • 输出短路和过热保护
  • 微型解决方案尺寸
    • 小型 2.2µH 电感器，单个 22µF 输出电容器
    • 12 焊球、1.5mm × 1.15mm、0.35mm 间距 WCSP 封装

2 应用

  • 智能手表
  • 智能追踪器
  • 可穿戴电子产品
  • 医疗传感器贴片和患者监护仪
  • 智能仪表和传感器节点
  • 电子智能锁
  • 工业物联网（智能传感器）和窄带物联网

3 说明

TPS63901 器件是一款具有超低静态电流（典型值为 75nA）的高效同步降压/升压转换器。该器件具有 32 个用户可编程的输出电压设置，范围为 1.8V 至 5V。

动态电压调节特性使各项应用可于运行期间在两个输出电压之间进行切换；例如，在待机运行期间，可通过降低系统电源电压来降低功耗。

凭借其宽电源电压范围和可编程的输入电流限制（1mA 至 100mA 和无限制），该器件非常适合与 3 芯串联碱性电池、1 芯锂二氧化锰 (Li-MnO2) 或 1 芯锂亚硫酰氯 (Li-SOCl2) 等各种一次电池以及二次电池搭配使用。

高输出电流功能支持 sub-1GHz、BLE、LoRa、wM-Bus 和 NB-IoT 等常用射频标准。

器件信息
器件型号(1)封装封装尺寸（标称值）
TPS63901WCSP (12)1.50 mm × 1.15 mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
TPS63901 简化版原理图简化版原理图

4 Pin Configuration and Functions

TPS63901 12-Ball WCSP Package (Top View)Figure 4-1 12-Ball WCSP Package (Top View)
Table 4-1 Pin Functions
Pin Type Description
Name No.

LX1

A1

—

 Switching node of the buck stage
VIN

A2

 — Supply voltage
EN

A3

 I Device enable. A high level applied to this pin enables the device and a low level disables it. It must not be left open.

GND

B1,C1

 — Ground
CFG1

B2

 I Configuration pin 1. Connect a resistor between this pin and ground to set VO(2) and input current limit. Must not be left open.
SEL

B3

 I Output voltage select. Selects VO(2) when a high level is applied to this pin. Selects VO(1) when a low level is applied to this pin. It must not be left open.
VOUT

C2,D2

 — Output voltage. The C2 and D2 pins must be connected together.
CFG2

C3

 I Configuration pin 2. Connect a resistor between this pin and ground to set VO(2) and input current limit. Must not be left open.
LX2

D1

 — Switching node of the boost stage
CFG3 D3 I Configuration pin 3. Connect a resistor between this pin and ground to set VO(1). Must not be left open.

5 Specifications

5.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VI Input voltage (VIN, LX1, LX2, VOUT, EN, CFG1, CFG2, CFG3, SEL)(2) –0.3 5.9 V
TJ Operating junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) All voltage values are with respect to network ground terminal, unless otherwise noted.

5.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VI Supply voltage 1.8 5.5 V
VO Output voltage 1.8 5.0 V
CI Input capacitance (VI = 2.5 V to 5 V, VO = 3.3 V, IO = 0.4 A)(1) 5 µF
CO Output capacitance (VI = 2.5 V to 5 V, VO = 3.3 V, IO = 0.4 A)(1) 10 µF
C(CFG) Capacitance (CFG1, CFG2, CFG3) 10 pF
L Inductance 2.2 µH
ISAT Inductor saturation current rating Unlimited current setting 2 A
≤ 100-mA current settings 1
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C
(1) Effective capacitance after DC bias effects have been considered.

 
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