ADC3681、ADC3682、ADC3683 (ADC368x) 属于低噪声、超低功耗、18 位、65MSPS 高速双通道 ADC 系列器件。该器件可实现超低噪声性能和 -160dBFS/Hz 的噪声频谱密度,还具有出色的线性度和动态范围。ADC368x 可提供出色的直流精度以及中频采样支持,因此适合各种应用。高速控制环路受益于低至仅一个时钟周期的低延迟。该 ADC 在 65Msps 下的功耗仅为每通道 94mW,且其功耗随采样率减小而降低。
ADC368x 使用串行 LVDS (SLVDS) 接口输出数据,可更大限度减少数字互连的次数。该器件提供双通道、单通道和半通道选项。ADC36xx 属于引脚对引脚兼容 ADC 系列,具有 16 位和 18 位分辨率和不同的速度等级。它采用 40 引脚 QFN 封装 (5mm x 5mm),支持 -40⁰C 至 +105⁰C 的工业级工作温度范围。
器件型号 | 封装(1) | 封装尺寸(标称值) |
---|---|---|
ADC368x | VQFN (40) | 5.00mm x 5.00mm |
器件型号 | 分辨率 | 采样率 |
---|---|---|
ADC3683 | 18 位 | 65MSPS |
ADC3682 | 18 位 | 25MSPS |
ADC3681 | 18 位 | 10MSPS |
Changes from Revision A (December 2021) to Revision B (October 2022)
Changes from Revision * (December 2020) to Revision A (December 2021)
PIN | I/O | Description | |
---|---|---|---|
Name | No. | ||
INPUT/REFERENCE | |||
AINP | 12 | I | Positive analog input, channel A |
AINM | 13 | I | Negative analog input, channel A |
BINP | 39 | I | Positive analog input, channel B |
BINM | 38 | I | Negative analog input, channel B |
VCM | 8 | O | Common-mode voltage output for the analog inputs, 0.95V |
VREF | 2 | I | External voltage reference input, 1.6V |
REFBUF | 4 | I | 1.2V external voltage reference input for use with internal reference buffer. Internal 100 kΩ pull-up resistor to AVDD. This pin is also used to configure default operating conditions. |
REFGND | 3 | I | Reference ground input, 0V |
CLOCK | |||
CLKP | 6 | I | Positive differential sampling clock input for the ADC |
CLKM | 7 | I | Negative differential sampling clock input for the ADC |
CONFIGURATION | |||
PDN/SYNC | 1 | I | Power down/Synchronization input. This pin can be configured via the SPI interface. Active high. This pin has an internal 21 kΩ pull-down resistor. |
RESET | 9 | I | Hardware reset. Active high. This pin has an internal 21 kΩ pull-down resistor. |
SEN | 16 | I | Serial interface enable. Active low. This pin has an internal 21 kΩ pull-up resistor to AVDD. |
SCLK | 35 | I | Serial interface clock input. This pin has an internal 21 kΩ pull-down resistor. |
SDIO | 10 | I/O | Serial interface data input and output. This pin has an internal 21 kΩ pull-down resistor. |
NC | 27 | - | Do not connect |
DIGITAL INTERFACE | |||
DA0P | 20 | O | Positive differential serial LVDS output for lane 0, channel A |
DA0M | 19 | O | Negative differential serial LVDS output for lane 0, channel A |
DA1P | 18 | O | Positive differential serial LVDS output for lane 1, channel A |
DA1M | 17 | O | Negative differential serial LVDS output for lane 1, channel A |
DB0P | 31 | O | Positive differential serial LVDS output for lane 0, channel B |
DB0M | 32 | O | Negative differential serial LVDS output for lane 0, channel B |
DB1P | 33 | O | Positive differential serial LVDS output for lane 1, channel B |
DB1M | 34 | O | Negative differential serial LVDS output for lane 1, channel B |
DCLKP | 23 | O | Positive differential serial LVDS bit clock output. |
DCLKM | 22 | O | Negative differential serial LVDS bit clock output. |
FCLKP | 28 | O | Positive differential serial LVDS frame clock output. |
FCLKM | 29 | O | Negative differential serial LVDS frame clock output. |
DCLKINP | 25 | I | Positive differential serial LVDS bit clock input. Internal 100 Ω differential termination. |
DCLKINM | 24 | I | Negative differential serial LVDS bit clock input. Internal 100 Ω differential termination. |
POWER SUPPLY | |||
AVDD | 5,15,36 | I | Analog 1.8V power supply |
GND | 11,14,37,40, PowerPad | I | Ground, 0V |
IOVDD | 21,30 | I | 1.8V power supply for digital interface |
IOGND | 26 | I | Ground, 0V for digital interface |