LM73100 具有输入反极性保护和过压保护功能的 2.7V 至 23V、5.5A 集成式理想二极管
- ZHCSLY9A October 2020 – December 2020 LM7310
  
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LM73100 具有输入反极性保护和过压保护功能的 2.7V 至 23V、5.5A 集成式理想二极管

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1 特性

宽工作输入电压范围：2.7V 至 23V
- 绝对最大值为 28V
- 可耐受高达 -15 V 的负电压
具有低导通电阻的集成式背对背 FET：R_ON = 28.4mΩ（典型值）
具有真反向电流阻断功能的理想二极管运行状态
快速过压保护
- 响应时间为 1.2μs（典型值）
- 可调节过压锁定 (OVLO)
稳态期间针对瞬态过流实现快速跳变响应
- 响应时间为 500ns（典型值）
- 故障后锁存
模拟负载电流监测器输出 (IMON)
- 电流范围：0.5A 至 5.5A
- 精度：±15%（最大值）(I_OUT ≥ 1A)
具有可调节欠压锁定阈值 (UVLO) 的高电平有效使能输入
可调节的输出压摆率控制 (dVdt)
过温保护
具有可调节阈值 (PGTH) 的电源正常状态指示 (PG)
小尺寸：QFN 2mm x 2mm，0.45mm 间距

2 应用

电源多路复用器/ORing
适配器输入保护
机顶盒/智能扬声器
USB PD 端口保护
PC/笔记本电脑/显示器/扩展坞
电动工具/充电器
POS 终端

3 说明

LM73100 是一款采用小型封装的高度集成电路保护和电源管理解决方案。该器件使用很少的外部元件即可提供多种保护模式，能够非常有效地抵御电压浪涌、反极性、反向电流和过多浪涌电流。

借助集成的背对背 FET 和始终阻断从输出到输入的反向电流等特性，该器件非常适合电源多路复用器/ORing 应用。该器件采用基于线性 ORing 的方案，可确保实现几乎为零的直流反向电流，并以超小的正向压降和功率耗散来模拟理想的二极管行为。

浪涌电流有特别要求的应用可以通过单个外部电容器设定输出转换率。通过在输入超过可调过压阈值时切断输出，可以保护负载免受输入过压情况的影响。该器件还可在稳态期间对瞬态过流事件提供快速跳变响应。

该器件可在模拟电流监测引脚上精确检测输出负载电流。

该器件可采用 2mm x 2mm 10 引脚 HotRod QFN 封装，旨在改善热性能并减小系统尺寸。

器件的额定工作结温范围为 –40°C 至 +125°C。

器件信息

器件型号	封装⁽¹⁾	封装尺寸（标称值）
LM73100RPW	QFN (10)	2mm x 2mm

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。

简化版原理图

4 Revision History

Changes from Revision * (October 2020) to Revision A (December 2020)

将状态从“预告信息”更改为“量产数据”Go

5 Pin Configuration and Functions

Figure 5-1 LM73100 RPW Package 10-Pin QFN Top View

Table 5-1 Pin Functions

PIN		TYPE	DESCRIPTION
NAME	NO.	TYPE	DESCRIPTION
EN/UVLO	1	Analog Input	Active High Enable for the device. A Resistor Divider on this pin from input supply to GND can be used to adjust the Undervoltage Lockout threshold. Do not leave floating. Refer to Section 7.3.2 for more details.
OVLO	2	Analog Input	A Resistor Divider on this pin from supply to GND can be used to adjust the Overvoltage Lockout threshold. This pin can also be used as an Active Low Enable for the device. Do not leave floating. Refer to Section 7.3.3 for more details.
PG	3	Digital Output	Power Good indication. This is an Open Drain signal which is asserted High when the internal powerpath is fully turned ON and PGTH input exceeds a certain threshold. Refer to Section 7.3.9 for more details.
PGTH	4	Analog Input	Power Good Threshold. Refer to Section 7.3.9 for more details.
IN	5	Power	Power Input.
OUT	6	Power	Power Output.
DVDT	7	Analog Output	A capacitor from this pin to GND sets the output turn on slew rate. Leave this pin floating for the fastest turn on slew rate. Refer to Section 7.3.4.1 for more details.
GND	8	Ground	This is the ground reference for all internal circuits and must be connected to system GND.
IMON	9	Analog Output	Analog load current monitor. The pin voltage can be used to monitor the output load current. An external resistor from this pin to ground sets the current monitor gain. Recommended to connect external clamp to limit the voltage below abs max rating in case of large current spikes. Connect to ground if not used. Do not leave floating. Refer to Section 7.3.5 for more details.
DNC	10	X	Internal test pin. Do not connect anything on this pin.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

Parameter		Pin	MIN	MAX	UNIT
V_IN	Maximum Input Voltage Range, –40 ℃ ≤ T_J ≤ 125 ℃	IN	max (–15, V_OUT - 21)	28	V
V_IN	Maximum Input Voltage Range, –10 ℃ ≤ T_J ≤ 125 ℃	IN	max (–15, V_OUT - 22)	28	V
V_OUT	Maximum Output Voltage Range, –40 ℃ ≤ T_J ≤ 125 ℃	OUT	–0.3	min (28, V_IN + 21)
V_OUT	Maximum Output Voltage Range, –10 ℃ ≤ T_J ≤ 125 ℃	OUT	–0.3	min (28, V_IN + 22)
V_OUT,PLS	Minimum Output Voltage Pulse (< 1 µs)	OUT	–0.8
V_EN/UVLO	Maximum Enable Pin Voltage Range ⁽²⁾	EN/UVLO	–0.3	6.5	V
V_OVLO	Maximum OVLO Pin Voltage Range ⁽²⁾	OVLO	–0.3	6.5	V
V_dVdT	Maximum dVdT Pin Voltage Range	dVdt	Internally Limited		V
V_PGTH	Maximum PGTH Pin Voltage Range ⁽²⁾	PGTH	–0.3	6.5	V
V_PG	Maximum PG Pin Voltage Range	PG	–0.3	6.5	V
V_IMON	Maximum IMON Pin Voltage Range	IMON		1.8	V
I_MAX	Maximum Continuous Switch Current	IN to OUT	5.5		A
T_J	Junction temperature		Internally Limited		°C
T_LEAD	Maximum Lead Temperature			300	°C
T_STG	Storage temperature		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If this pin has a pull-up up to V_IN, it is recommended to use a resistance of 350 kΩ or higher to limit the current under conditions where IN can be exposed to reverse polarity.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

Parameter		Pin	MIN	MAX	UNIT
V_IN	Input Voltage Range	IN	2.7	23	V
V_OUT	Output Voltage Range	OUT		min (23, V_IN + 20)	V
V_EN/UVLO	Enable Pin Voltage Range	EN/UVLO		5 ⁽²⁾	V
V_OVLO	OVLO Pin Voltage Range	OVLO	0.5	1.5	V
V_dVdT	dVdT Capacitor Voltage Rating	dVdt	V_IN + 5 V ⁽¹⁾		V
V_PGTH	PGTH Pin Voltage Range	PGTH		5 ⁽³⁾	V
V_PG	PG Pin Voltage Range	PG		5 ⁽³⁾	V
V_IMON	IMON Pin Voltage	IMON		1.5	V
I_MAX	Continuous Switch Current, , T_J ≤ 125 ℃	IN to OUT		5.5	A
T_J	Junction temperature		–40	125	°C

(1) In a PowerMUX/ORing scenario with unequal supplies, the dVdt capacitor rating for each device should be chosen based on the highest of the 2 rails.

(2) For supply voltages below 5V, it is okay to pull up the EN pin to IN directly. For supply voltages greater than 5V or systems which can be exposed to reverse polarity on input supply, it is recommended to use a pull-up resistor with a minimum value of 350 kΩ.

(3) For systems which can be exposed to reverse polarity on input supply, if this pin is referred to input supply, it is recommended to use a pull-up resistor with a minimum value of 350 kΩ to limit the current through the pin.

6.4 Thermal Information

THERMAL METRIC ⁽¹⁾		LM73100	UNIT
		RPW (QFN)
		10 PINS
R_θJA	Junction-to-ambient thermal resistance	41.7 ⁽²⁾	°C/W
R_θJA	Junction-to-ambient thermal resistance	74.5 ⁽³⁾	°C/W
Ψ_JT	Junction-to-top characterization parameter	1	°C/W
Ψ_JB	Junction-to-board characterization parameter	20 ⁽²⁾	°C/W
Ψ_JB	Junction-to-board characterization parameter	27.6 ⁽³⁾	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) Based on simulations conducted with the device mounted on a custom 4-layer PCB (2s2p) with 8 thermal vias under device

(3) Based on simulations conducted with the device mounted on a JEDEC 4-layer PCB (2s2p) with no thermal vias under device

6.5 Electrical Characteristics

(Test conditions unless otherwise noted) –40°C ≤ T_J ≤ 125°C, V_IN = 12 V, V_EN/UVLO = 2 V, V_OVLO = 0 V, dVdT = Open, R_IMON = 549 Ω, PGTH = Open, PG = Open, OUT = Open. All voltages referenced to GND.

Test Parameter	Description	MIN	TYP	MAX	UNITS
INPUT SUPPLY (IN)
V_UVP(R)	IN supply UVP rising threshold	2.44	2.53	2.64	V
V_UVP(F)	IN supply UVP falling threshold	2.35	2.42	2.55	V
I_Q(ON)	IN supply quiescent current, V_IN = 2.7 V		347	492	µA
	IN supply quiescent current, V_IN = 12 V		426	509	µA
	IN supply quiescent current, V_IN = 23 V		459	612	µA
I_Q(RCB)	IN supply quiescent current during RCB, V_OUT > V_IN		189.7	234	µA
I_Q(OFF)	IN supply disabled state current (V_SD(F)< V_EN < V_UVLO(R))		74.5	97.6	µA
I_SD	IN supply shutdown current (V_EN < V_SD(F))		4.6	8.2	µA
I_Q(OVLO)	IN supply OFF state current (OVLO condition), V_OUT > V_IN		191		µA
I_INLKG(IRPP)	IN supply leakage current (V_IN = –14 V, V_OUT = 0 V)		-3.5		µA
ON RESISTANCE (IN - OUT)
R_ON	V_IN = 12 V, I_OUT= 3 A, T_J = 25 ℃		28.4		mΩ
R_ON	2.7 ≤ V_IN ≤ 23 V, –40 ℃ ≤ T_J ≤ 125 ℃			44.85	mΩ
ENABLE/UNDERVOLTAGE LOCKOUT (EN/UVLO)
V_UVLO(R)	EN/UVLO rising threshold	1.183	1.2	1.223	V
V_UVLO(F)	EN/UVLO falling threshold	1.076	1.09	1.116	V
V_SD(F)	EN/UVLO falling threshold for lowest shutdown current	0.45	0.74		V
I_ENLKG	EN/UVLO leakage current	–0.1		0.1	µA
OVERVOLTAGE LOCKOUT (OVLO)
V_OV(R)	OVLO rising threshold	1.183	1.2	1.223	V
V_OV(F)	OVLO falling threshold	1.076	1.09	1.116	V
I_OVLKG	OVLO pin leakage current, 0.5 V < V_OVLO < 1.5 V	–0.1		0.1	µA
I_OUTLKG(OVLO)	OUT leakage current (OVLO condition), V_OUT > V_IN		317		µA
FIXED FAST-TRIP (OUT)
I_FT	Fixed fast-trip current threshold		21.9		A
OUTPUT LOAD CURRENT MONITOR (IMON)
G_IMON	Analog load current monitor gain (I_MON: I_OUT), I_OUT = 0.5 A to 1 A	144	181	216	µA/A
G_IMON	Analog load current monitor gain (I_MON: I_OUT), I_OUT = 1 A to 5.5 A	153	181	207	µA/A
REVERSE CURRENT BLOCKING (IN - OUT)
V_FWD	(V_IN - V_OUT) forward regulation voltage, I_OUT= 10 mA	4.8	16.4	28.4	mV
V_REVTH	(V_OUT - V_IN) threshold for fast BFET turn off (enter reverse current blocking)	22.7	29.3	36.5	mV
V_FWDTH	(V_IN - V_OUT) threshold for fast BFET turn on (exit reverse current blocking)	85.9	105.8	125	mV
I_REVLKG(OFF)	Reverse leakage current (unpowered condition), V_OUT = 12 V, V_IN= 0 V		4.8		µA
I_REVLKG	Reverse leakage current, (V_OUT - V_IN) = 21.5 V		10.10	15.86	µA
I_OUTLKG(RCB)	OUT leakage current during RCB state while ON, (V_OUT - V_IN) = 1 V		247.6	322	µA
POWER GOOD INDICATION (PG)
V_PGD	PG pin low voltage while de-asserted, V_IN < V_UVP(F), V_EN < V_SD, I_PG = 26 µA		0.67	0.9	V
	PG pin low voltage while de-asserted, V_IN < V_UVP(F), V_EN < V_SD, I_PG = 242 µA		0.78	1	V
	PG pin low voltage while de-asserted, V_IN > V_UVP(R)			0.6	V
I_PGLKG	PG pin leakage current while asserted		0.5	2	µA
POWERGOOD THRESHOLD (PGTH)
V_PGTH(R)	PGTH rising threshold	1.183	1.2	1.223	V
V_PGTH(F)	PGTH falling threshold	1.076	1.09	1.116	V
I_PGTHLKG	PGTH leakage current	–1		1	µA
OVERTEMPERATURE PROTECTION (OTP)
TSD	Thermal shutdown rising threshold, T_J↑		154		°C
TSD_HYS	Thermal shutdown hysteresis, T_J↓		10		°C
DVDT
I_dVdt	dVdt pin charging current	1.15	2.34	3.66	µA

6.6 Timing Requirements

PARAMETER		TEST CONDITIONS	TYP	UNIT
t_OVLO	Overvoltage lock-out response time	V_OVLO > V_OV(R) to V_OUT↓	1.1	µs
t_FT	Fixed fast-trip response time	I_OUT > I_FT to I_OUT↓	500	ns
t_SWRCB	Reverse Current Blocking recovery time	(V_IN - V_OUT) > V_FWDTH to V_OUT ↑	50	µs
t_RCB	Reverse Current Blocking fast comparator response time	(V_OUT - V_IN) > 1.3 x V_REVTH to BFET OFF	1	µs
t_PGA	PG Assertion de-glitch		12	µs
t_PGD	PG De-assertion de-glitch		12	µs

6.7 Switching Characteristics

The output rising slew rate is internally controlled and constant across the entire operating voltage range to ensure the turn on timing is not affected by the load conditions. The rising slew rate can be adjusted by adding capacitance from the dVdt pin to ground. As C_dVdt is increased it will slow the rising slew rate (SR). See Slew Rate and Inrush Current Control (dVdt) section for more details. The Turn-Off Delay and Fall Time, however, are dependent on the RC time constant of the load capacitance (C_OUT) and Load Resistance (R_L). The Switching Characteristics are only valid for the power-up sequence where the supply is available in steady state condition and the load voltage is completely discharged before the device is enabled.Typical Values are taken at T_J = 25°C unless specifically noted otherwise. R_L = 100 Ω, C_OUT = 1 µF

PARAMETER		V_IN	C_dVdt = Open	C_dVdt = 1800 pF	C_dVdt = 3300 pF	UNIT
SR_ON	Output Rising slew rate	2.7 V	12.14	0.87	0.5	V/ms
		12 V	28.1	1.09	0.61
		23 V	44.78	1.25	0.71
t_D,ON	Turn on delay	2.7 V	0.09	0.6	0.97	ms
		12 V	0.1	1.32	2.35
		23 V	0.11	1.99	3.69
t_R	Rise time	2.7 V	0.17	2.51	4.33	ms
		12 V	0.35	8.1	15.37
		23 V	0.40	14.4	25.89
t_ON	Turn on time	2.7 V	0.27	3.11	5.31	ms
		12 V	0.45	10.08	17.72
		23 V	0.50	16.41	29.57
t_D,OFF	Turn off delay	2.7 V	64.44	64.44	64.44	µs
		12 V	25.32	25.32	25.32
		23 V	23.02	23.02	23.02

Figure 6-1 LM73100 Switching Times

6.8 Typical Characteristics

Figure 6-2 ON-Resistance vs Supply Voltage

Figure 6-4 IN Quiescent Current vs Supply Voltage

Figure 6-6 IN Undervoltage Threshold vs Temperature

Figure 6-8 EN/UVLO Shutdown Threshold vs Temperature

Figure 6-10 OVLO Threshold vs Temperature

Figure 6-12 Reverse Comparator Threshold vs Temperature

Figure 6-14 Forward Regulation Voltage vs Supply Voltage

Figure 6-16 OUT Leakage Current During ON-State Reverse Current Blocking

Figure 6-18 Analog Current Monitor Gain Accuracy

Figure 6-20 Analog Current Monitor Gain vs Load Current

Figure 6-22 Steady State Fast-Trip Comparator Threshold vs Temperature

Figure 6-24 Time to Thermal Shut-Down During Inrush State

V_EN/UVLO = 3 V, C_OUT = 220 μF, C_dVdt = 10 nF, V_IN ramped up to 12 V

Figure 6-26 Start Up with IN Supply

C_OUT = 220 μF, C_dVdt = 10 nF, EN/UVLO connected to IN through resistor ladder, 12 V hot-plugged to IN

Figure 6-28 Input Hot-Plug

C_OUT = 220 μF, PG pulled up to 3 V, -15 V hot-plugged to IN

Figure 6-30 Input Reverse Polarity Protection - Fast Ramp

IN= Open, C_OUT = 220 μF, PG pulled up to 3 V, 20 V hot-plugged to OUT

Figure 6-32 Reverse Current Blocking Response in OFF State

C_OUT = 220 μF, R_OUT = 20 Ω, OVLO threshold = 13.2 V, V_IN ramped up from 12 V to 16 V

Figure 6-34 Input Overvoltage Protection

V_IN = 12 V, C_OUT = Open, OUT stepped from Open → Short-circuit to GND

Figure 6-36 Fast-Trip Response During Steady State - Zoomed In

Figure 6-3 Forward Voltage Drop vs Load Current

Figure 6-5 IN Quiescent Current vs Temperature

Figure 6-7 EN/UVLO Threshold vs Temperature

Figure 6-9 EN/UVLO Shutdown Threshold vs Supply Voltage

Figure 6-11 PGTH Threshold vs Temperature

Figure 6-13 Forward Regulation Voltage vs Temperature

Figure 6-15 Forward Comparator Threshold vs Temperature

Figure 6-17 Reverse Leakage Current During OFF-State

Figure 6-19 Analog Current Monitor gain vs Temperature

Figure 6-21 DVDT Charging Current vs Temperature

Figure 6-23 Steady State Fast-Trip Current Threshold vs Temperature

Figure 6-25 Time to thermal Shut-Down During Steady State

V_IN = 12 V, C_OUT = 220 μF, C_dVdt = 10 nF, V_EN/UVLO stepped up to 3 V

Figure 6-27 Start Up with EN

V_IN = 12 V, R_OUT = 20 Ω, C_OUT = 220 μF, C_dVdt = 10 nF, V_EN/UVLO stepped up to 3 V

Figure 6-29 Inrush Current with RC Load

C_OUT = 220 μF, PG pulled up to 3 V, V_IN ramped down from 0 V to -15 V and then ramped up to 0 V

Figure 6-31 Input Reverse Polarity Protection - Slow Ramp

IN= Open, C_OUT = 220 μF, PG pulled up to 3 V, V_OUT ramped up from 0 V to 20 V

Figure 6-33 Reverse Current Blocking Response in OFF State

V_IN = 12 V, C_OUT = Open, OUT stepped from Open → Short-circuit to GND

Figure 6-35 Fast-Trip Response During Steady State

7 Detailed Description

7.1 Overview

The LM73100 is an integrated ideal diode that is used to ensure safe power delivery in a system. The device starts its operation by monitoring the IN bus. When the input supply voltage (V_IN) exceeds the undervoltage protection threshold (V_UVP), the device samples the EN/UVLO pin. A high level (> V_UVLO(R)) on this pin enables the internal power path (BFET+HFET) to start conducting and allow current to flow from IN to OUT. When EN/UVLO pin is held low (< V_UVLO(F)), the internal power path is turned off. In case of reverse voltages appearing at the input, the power path remains OFF thereby protecting the output load.

After a successful start-up sequence, the device now actively monitors its load current and input voltage, and controls the internal HFET to ensure that the fast-trip threshold (I_FT) is not exceeded and overvoltage spikes are cut-off once they cross the user adjustable overvoltage lockout threshold (V_OVLO). This helps to keep the system safe from harmful levels of voltage and current.

The device has integrated reverse current blocking FET (BFET) which operates like an ideal diode. The BFET is linearly regulated to maintain a small constant forward drop (V_FWD) in forward conduction mode and turned off completely to block reverse current from OUT to IN if output voltage exceeds the input voltage.

The device also has a built-in thermal sensor based shutdown mechanism to protect itself in case the device temperature (T_J) exceeds the recommended operating conditions.