ZHCSKM0J November   2009  – July 2021 TUSB1210

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Analog I/O Electrical Characteristics
    6. 6.6  Digital I/O Electrical Characteristics
    7. 6.7  Digital IO Pins (Non-ULPI)
    8. 6.8  PHY Electrical Characteristics
    9. 6.9  Pullup/Pulldown Resistors
    10. 6.10 OTG Electrical Characteristics
    11. 6.11 OTG ID Electrical
    12. 6.12 Power Characteristics
    13. 6.13 Switching Characteristics
    14. 6.14 Timing Requirements
      1. 6.14.1 Timing Parameter Definitions
      2. 6.14.2 Interface Target Frequencies
    15. 6.15 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Processor Subsystem
        1. 7.3.1.1 Clock Specifications
          1. 7.3.1.1.1 USB PLL Reference Clock
          2. 7.3.1.1.2 ULPI Input Clock Configuration
          3. 7.3.1.1.3 ULPI Output Clock Configuration
          4. 7.3.1.1.4 Clock 32 kHz
          5. 7.3.1.1.5 Reset
        2. 7.3.1.2 USB Transceiver
          1. 7.3.1.2.1 PHY Electrical Characteristics
            1. 7.3.1.2.1.1 LS/FS Single-Ended Receivers
            2. 7.3.1.2.1.2 LS/FS Differential Receiver
            3. 7.3.1.2.1.3 LS/FS Transmitter
            4. 7.3.1.2.1.4 HS Differential Receiver
            5. 7.3.1.2.1.5 HS Differential Transmitter
            6. 7.3.1.2.1.6 UART Transceiver
          2. 7.3.1.2.2 OTG Characteristics
    4. 7.4 Device Functional Modes
      1. 7.4.1 TUSB1210 Modes vs ULPI Pin Status
    5. 7.5 Register Map
      1. 7.5.1  VENDOR_ID_LO
      2. 7.5.2  VENDOR_ID_HI
      3. 7.5.3  PRODUCT_ID_LO
      4. 7.5.4  PRODUCT_ID_HI
      5. 7.5.5  FUNC_CTRL
      6. 7.5.6  FUNC_CTRL_SET
      7. 7.5.7  FUNC_CTRL_CLR
      8. 7.5.8  IFC_CTRL
      9. 7.5.9  IFC_CTRL_SET
      10. 7.5.10 IFC_CTRL_CLR
      11. 7.5.11 OTG_CTRL
      12. 7.5.12 OTG_CTRL_SET
      13. 7.5.13 OTG_CTRL_CLR
      14. 7.5.14 USB_INT_EN_RISE
      15. 7.5.15 USB_INT_EN_RISE_SET
      16. 7.5.16 USB_INT_EN_RISE_CLR
      17. 7.5.17 USB_INT_EN_FALL
      18. 7.5.18 USB_INT_EN_FALL_SET
      19. 7.5.19 USB_INT_EN_FALL_CLR
      20. 7.5.20 USB_INT_STS
      21. 7.5.21 USB_INT_LATCH
      22. 7.5.22 DEBUG
      23. 7.5.23 SCRATCH_REG
      24. 7.5.24 SCRATCH_REG_SET
      25. 7.5.25 SCRATCH_REG_CLR
      26. 7.5.26 VENDOR_SPECIFIC1
      27. 7.5.27 VENDOR_SPECIFIC1_SET
      28. 7.5.28 VENDOR_SPECIFIC1_CLR
      29. 7.5.29 VENDOR_SPECIFIC2
      30. 7.5.30 VENDOR_SPECIFIC2_SET
      31. 7.5.31 VENDOR_SPECIFIC2_CLR
      32. 7.5.32 VENDOR_SPECIFIC1_STS
      33. 7.5.33 VENDOR_SPECIFIC1_LATCH
      34. 7.5.34 VENDOR_SPECIFIC3
      35. 7.5.35 VENDOR_SPECIFIC3_SET
      36. 7.5.36 VENDOR_SPECIFIC3_CLR
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Host or OTG, ULPI Input Clock Mode Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Unused Pins Connection
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Device, ULPI Output Clock Mode Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Unused Pins Connection
        3. 8.2.2.3 Application Curve
    3. 8.3 External Components
  9. Power Supply Recommendations
    1. 9.1 TUSB1210 Power Supply
    2. 9.2 Ground
    3. 9.3 Power Providers
    4. 9.4 Power Modules
      1. 9.4.1 VDD33 Regulator
      2. 9.4.2 VDD18 Supply
      3. 9.4.3 VDD15 Regulator
    5. 9.5 Power Consumption
  10. 10Layout
    1. 10.1 TUSB121x USB2.0 Product Family Board Layout Recommendations
    2. 10.2 Layout Guidelines
    3. 10.3 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

TUSB1210 Modes vs ULPI Pin Status

Table 7-1, Table 7-2, and Table 7-3 show the status of each of the 12 ULPI pins including input or output direction and whether output pins are driven to ‘0’ or to ‘1’, or pulled up or pulled down through the internal pullup or pulldown resistors.

Note that pullup or pulldown resistors are automatically replaced by driven ‘1’/’0’ levels respectively once internal IORST is released, with the exception of the pullup on STP which is maintained in all modes.

Pin assignment changes in ULPI 3-pin serial mode, ULPI 6-pin serial mode, and UART mode. Unused pins are tied low in these modes as shown below.

Table 7-1 TUSB1210 Modes vs ULPI Pin Status:ULPI Synchronous Mode Power-Up
ULPI SYNCHRONOUS MODE POWER-UP
UNTIL IORST RELEASEPLL OFFPLL ON + STP HIGHPLL ON + STP LOW
PIN NO.PIN NAMEDIRPU/PDDIRPU/PDDIRPU/PDDIRPU/PD
26CLOCKHizPDIPDIOIO
31DIRHizPUO, (‘1’)O, (‘0’)O
2NXTHizPDO, (‘0’)O, (‘0’)O
29STPHizPUIPUIPUIPU
3DATA0HizPDO, (‘0’)IPDIO
4DATA1HizPDO, (‘0’)IPDIO
5DATA2HizPDO, (‘0’)IPDIO
6DATA3HizPDO, (‘0’)IPDIO
7DATA4HizPDO, (‘0’)IPDIO
9DATA5HizPDO, (‘0’)IPDIO
10DATA6HizPDO, (‘0’)IPDIO
13DATA7HizPDO, (‘0’)IPDIO
Table 7-2 TUSB1210 Modes vs ULPI Pin Status: USB Suspend Mode
SUSPEND MODELINK / EXTERNAL RECOMMENDED SETTING DURING SUSPEND MODE
PIN NO.PIN NAMEDIRPU/PDDIRPU/PD
26CLOCKIO
31DIRO, (‘1’)I
2NXTO, (‘0’)I
29STPIPU(1)O, (‘0’)
3DATA0O, (LINESTATE0)I
4DATA1O, (LINESTATE1)I
5DATA2O, (‘0’)I
6DATA3O, (INT)I
7DATA4O, (‘0’)I
9DATA5O, (‘0’)I
10DATA6O, (‘0’)I
13DATA7O, (‘0’)I
Can be disabled by software before entering Suspend Mode to reduce current consumption
Table 7-3 TUSB1210 Modes vs ULPI Pin Status: ULPI 6-Pin Serial Mode and UART Mode
ULPI 6-PIN SERIAL MODEULPI 3-PIN SERIAL MODEUART MODE
PIN NO.PIN NAMEDIRPU/PDPIN NAMEDIRPU/PDPIN NAMEDIRPU/PD
26CLOCK (1)IOCLOCK (1)IOCLOCK (1)IO
31DIRODIRODIRO
2NXTONXTONXTO
29STPIPUSTPIPUSTPIPU
3TX_ENABLEITX_ENABLEITXDI
4TX_DATIDATIORXDIO
5TX_SE0ISE0IOtie lowO
6INTOINTOINTO
7RX_DPOtie lowOtie lowO
9RX_DMOtie lowOtie lowO
10RX_RCVOtie lowOtie lowO
13tie lowOtie lowOtie lowO