ZHCSJZ2D August   2019  – April 2021 THS6222

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 12 V
    6. 6.6 Electrical Characteristics: VS = 32 V
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics: VS = 12 V
    9. 6.9 Typical Characteristics: VS = 32 V
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Common-Mode Buffer
      2. 7.3.2 Thermal Protection and Package Power Dissipation
      3. 7.3.3 Output Voltage and Current Drive
      4. 7.3.4 Breakdown Supply Voltage
      5. 7.3.5 Surge Test Results
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Broadband PLC Line Driving
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 What to Do and What Not to Do
      1. 8.3.1 Do
      2. 8.3.2 Do Not
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Wafer and Die Information
    3. 10.3 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Typical Characteristics: VS = 12 V

At TA ≈ 25°C, AV = 10 V/V, RF = 1.24 kΩ, RL = 50 Ω, RS = 2.5 Ω, RADJ = 0 Ω, full-bias mode, and VCM = open (unless otherwise noted).

GUID-26FFFAB1-8533-49B3-BB47-3DD7C400C669-low.gif
VO = 2 VPP
Figure 6-1 Small-Signal Frequency Response
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SGCC HPLC profiles, crest factor = 5 V/V, see the Broadband PLC Line Driving section for more details.
Figure 6-3 Out-of-Band Suppression
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AV = 10 V/V, VO = 2 VPP
Figure 6-5 Small-Signal Frequency Response vs RF
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AV = 10 V/V, VO = 2 VPP
Figure 6-7 Small-Signal Gain Flatness vs RF
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VO = 16 VPP
Figure 6-9 Large-Signal Gain Flatness
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AV = 10 V/V
Figure 6-11 Large-Signal Frequency Response vs VO
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AV = 10 V/V, VO = 2 VPP
Figure 6-13 Small-Signal Frequency Response vs Bias Modes
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AV = 15 V/V, VO = 16 VPP
Figure 6-15 Large-Signal Frequency Response vs Bias Modes
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VO = 2 VPP
Figure 6-17 Harmonic Distortion vs Frequency
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f = 1 MHz, AV = 10 V/V
Figure 6-19 Harmonic Distortion vs VO
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f = 1 MHz, VO = 2 VPP, AV = 10 V/V
Figure 6-21 Harmonic Distortion vs RL
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±12.2 kHz tone spacing, VO = 2 VPP per tone
Figure 6-23 Intermodulation Distortion vs Frequency
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VO step = 2 VPP
Figure 6-25 Small-Signal Pulse Response
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Full-bias simulation
Figure 6-27 Open-Loop Transimpedance Gain and Phase vs Frequency
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Low-bias simulation
Figure 6-29 Open-Loop Transimpedance Gain and Phase vs Frequency
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RL = no load, average of 30 devices
Figure 6-31 Quiescent Current vs Single-Supply Voltage
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RL = no load, average of 30 devices
Figure 6-33 Quiescent Current vs Temperature
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B1 = full-bias to mid-bias transition with B2 = DGND, B2 = full-bias to low-bias transition with B1 = DGND, DGND = VS–
Figure 6-35 Mode Transition Voltage Threshold
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VO = 16 VPP
Figure 6-2 Large-Signal Frequency Response
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AV = 15 V/V, VO = 2 VPP
Figure 6-4 Small-Signal Frequency Response vs Temperature
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AV = 15 V/V, VO = 2 VPP
Figure 6-6 Small-Signal Frequency Response vs RF
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AV = 15 V/V, VO = 2 VPP
Figure 6-8 Small-Signal Gain Flatness vs RF
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VO = 100 mVPP
Frequency response is measured at the device output pin before the isolation resistor.
Figure 6-10 Small-Signal Frequency Response vs CLOAD
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AV = 15 V/V
Figure 6-12 Large-Signal Frequency Response vs VO
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AV = 15 V/V, VO = 2 VPP
Figure 6-14 Small-Signal Frequency Response vs Bias Modes
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Figure 6-16 Input Voltage and Current Noise Density vs Frequency
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f = 1 MHz, VO = 2 VPP
Figure 6-18 Harmonic Distortion vs Gain
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f = 10 MHz, AV = 10 V/V
Figure 6-20 Harmonic Distortion vs VO
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f = 10 MHz, VO = 2 VPP, AV = 10 V/V
Figure 6-22 Harmonic Distortion vs RL
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VIN = 2.8-VPP triangular waveform
Figure 6-24 Overdrive Recovery
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VO step = 16 VPP
Figure 6-26 Large-Signal Pulse Response
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Mid-bias simulation
Figure 6-28 Open-Loop Transimpedance Gain and Phase vs Frequency
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Simulation
Figure 6-30 Open-Loop Output Impedance vs Frequency
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Average of 30 devices
Figure 6-32 Quiescent Current vs RADJ
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TJ = 50°C, simulation
Figure 6-34 PSRR and CMRR vs Frequency
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Figure 6-36 Full-Bias and Shutdown Mode Transition Timing