ZHCSJU9E January   2007  – June 2019 TPS40077

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化应用示意图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Minimum Pulse Duration
      2. 7.3.2  Slew Rate Limit On VDD
      3. 7.3.3  Setting The Switching Frequency (Programming The Clock Oscillator)
      4. 7.3.4  Loop Compensation
      5. 7.3.5  Shutdown and Sequencing
      6. 7.3.6  Boost and LVBP Bypass Capacitance
      7. 7.3.7  Internal Regulators
      8. 7.3.8  Power Dissipation
      9. 7.3.9  Boost Diode
      10. 7.3.10 Synchronous Rectifier Control
    4. 7.4 Programming
      1. 7.4.1 Programming The Ramp Generator Circuit and UVLO
      2. 7.4.2 Programming Soft Start
      3. 7.4.3 Programming Short-Circuit Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Regulator 8-V to 16-V Input, 1.8-V Output at 10 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Train Components
            1. 8.2.1.2.1.1  Output Inductor, LOUT
            2. 8.2.1.2.1.2  Output Capacitor, COUT, ELCO and MLCC
            3. 8.2.1.2.1.3  Input Capacitor, CIN ELCO and MLCC
            4. 8.2.1.2.1.4  Switching MOSFET, QSW
            5. 8.2.1.2.1.5  Rectifier MOSFET, QSR
            6. 8.2.1.2.1.6  Timing Resistor, RT
            7. 8.2.1.2.1.7  Feed-Forward and UVLO Resistor, RKFF
            8. 8.2.1.2.1.8  Soft-Start Capacitor, CSS
            9. 8.2.1.2.1.9  Short-Circuit Protection, RILIM and CILIM
            10. 8.2.1.2.1.10 Boost Voltage, CBOOST and DBOOST (Optional)
            11. 8.2.1.2.1.11 Closing the Feedback Loop, RZ1, RP1, RPZ2, RSET1, RSET2, CZ2, CP2, and CPZ1
        3. 8.2.1.3 Application Curves
    3. 8.3 Additional System Examples
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10器件和文档支持
    1. 10.1 器件支持
      1. 10.1.1 第三方产品免责声明
    2. 10.2 文档支持
      1. 10.2.1 相关文档
    3. 10.3 接收文档更新通知
    4. 10.4 社区资源
    5. 10.5 商标
    6. 10.6 静电放电警告
    7. 10.7 Glossary
  11. 11机械、封装和可订购信息

7.3.7 Internal Regulators

The internal regulators are linear regulators that provide controlled voltages from which the drivers and the internal circuitry operate. The DBP pin is connected to a nominal 8-V regulator that provides power for the driver circuits. This regulator has two modes of operation. At VDD voltages below 8.5 V, the regulator is in a low-dropout mode of operation and tries to provide as little impedance as possible from VDD to DBP. Above 10 V at VDD, the regulator regulates DBP to 8 V. Between these two voltages, the regulator remains in the state it was in when VDD entered this region (see Figure 20). Small amounts of current can be drawn from this pin for other circuit functions, as long as power dissipation in the controller device remains at acceptable levels and junction temperature does not exceed 125°C.

The LVBP pin is connected to another internal regulator that provides 4.2 V (nom) for the operation of low-voltage circuitry in the controller. This pin can be used for other circuit purposes, but extreme care must be taken to ensure that no extra noise is coupled onto this pin; otherwise, controller performance suffers. Current draw is not to exceed 1 mA. See Figure 21 for typical output voltage at this pin.