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  • 适用于桥式传感器的 ADS1235 精密 3 通道差动输入 7200SPS 24 位 Δ-Σ ADC

    • ZHCSIU3 September   2018 ADS1235

      PRODUCTION DATA.  

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  • 适用于桥式传感器的 ADS1235 精密 3 通道差动输入 7200SPS 24 位 Δ-Σ ADC
  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      框图
      2.      ADC 转换噪声
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Noise Performance
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Inputs
        1. 8.3.1.1 ESD Diodes
        2. 8.3.1.2 Input Multiplexer
        3. 8.3.1.3 Temperature Sensor
        4. 8.3.1.4 Inputs Open
        5. 8.3.1.5 Internal VCOM Connection
        6. 8.3.1.6 Alternate Functions
      2. 8.3.2 PGA
        1. 8.3.2.1 Input Voltage Range
        2. 8.3.2.2 PGA Bypass Mode
      3. 8.3.3 PGA Voltage Monitor
      4. 8.3.4 Reference Voltage
        1. 8.3.4.1 External Reference
        2. 8.3.4.2 AVDD – AVSS Reference (Default)
        3. 8.3.4.3 Reference Monitor
      5. 8.3.5 General-Purpose Input/Outputs (GPIOs)
      6. 8.3.6 Modulator
      7. 8.3.7 Digital Filter
        1. 8.3.7.1 Sinc Filter
          1. 8.3.7.1.1 Sinc Filter Frequency Response
        2. 8.3.7.2 FIR Filter
          1. 8.3.7.2.1 FIR Filter Frequency Response
        3. 8.3.7.3 Filter Bandwidth
        4. 8.3.7.4 50-Hz and 60-Hz Normal Mode Rejection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Conversion Control
        1. 8.4.1.1 Continuous-Conversion Mode
        2. 8.4.1.2 Pulse-Conversion Mode
        3. 8.4.1.3 Conversion Latency
        4. 8.4.1.4 Start-Conversion Delay
      2. 8.4.2 Chop Mode
      3. 8.4.3 AC-Bridge Excitation Mode
      4. 8.4.4 ADC Clock Mode
      5. 8.4.5 Power-Down Mode
        1. 8.4.5.1 Hardware Power-Down
        2. 8.4.5.2 Software Power-Down
      6. 8.4.6 Reset
        1. 8.4.6.1 Power-on Reset
        2. 8.4.6.2 Reset by Pin
        3. 8.4.6.3 Reset by Command
      7. 8.4.7 Calibration
        1. 8.4.7.1 Offset and Full-Scale Calibration
          1. 8.4.7.1.1 Offset Calibration Registers
          2. 8.4.7.1.2 Full-Scale Calibration Registers
        2. 8.4.7.2 Offset Self-Calibration (SFOCAL)
        3. 8.4.7.3 Offset System-Calibration (SYOCAL)
        4. 8.4.7.4 Full-Scale Calibration (GANCAL)
        5. 8.4.7.5 Calibration Command Procedure
        6. 8.4.7.6 User Calibration Procedure
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
        1. 8.5.1.1 Chip Select (CS)
        2. 8.5.1.2 Serial Clock (SCLK)
        3. 8.5.1.3 Data Input (DIN)
        4. 8.5.1.4 Data Output/Data Ready (DOUT/DRDY)
        5. 8.5.1.5 Serial Interface Auto-Reset
      2. 8.5.2 Data Ready (DRDY)
        1. 8.5.2.1 DRDY in Continuous-Conversion Mode
        2. 8.5.2.2 DRDY in Pulse-Conversion Mode
        3. 8.5.2.3 Data Ready by Software Polling
      3. 8.5.3 Conversion Data
        1. 8.5.3.1 Status byte (STATUS)
        2. 8.5.3.2 Conversion Data Format
      4. 8.5.4 CRC
      5. 8.5.5 Commands
        1. 8.5.5.1  NOP Command
        2. 8.5.5.2  RESET Command
        3. 8.5.5.3  START Command
        4. 8.5.5.4  STOP Command
        5. 8.5.5.5  RDATA Command
        6. 8.5.5.6  SYOCAL Command
        7. 8.5.5.7  GANCAL Command
        8. 8.5.5.8  SFOCAL Command
        9. 8.5.5.9  RREG Command
        10. 8.5.5.10 WREG Command
        11. 8.5.5.11 LOCK Command
        12. 8.5.5.12 UNLOCK Command
    6. 8.6 Register Map
      1. 8.6.1  Device Identification (ID) Register (address = 00h) [reset = Cxh]
        1. Table 28. ID Register Field Descriptions
      2. 8.6.2  Device Status (STATUS) Register (address = 01h) [reset = 01h]
        1. Table 29. STATUS Register Field Descriptions
      3. 8.6.3  Mode 0 (MODE0) Register (address = 02h) [reset = 24h]
        1. Table 30. MODE0 Register Field Descriptions
      4. 8.6.4  Mode 1 (MODE1) Register (address = 03h) [reset = 01h]
        1. Table 31. MODE1 Register Field Descriptions
      5. 8.6.5  Mode 2 (MODE2) Register (address = 04h) [reset = 00h]
        1. Table 32. MODE2 Register Field Descriptions
      6. 8.6.6  Mode 3 (MODE3) Register (address = 05h) [reset = 00h]
        1. Table 33. MODE3 Register Field Descriptions
      7. 8.6.7  Reference Configuration (REF) Register (address = 06h) [reset = 05h]
        1. Table 34. REF Register Field Descriptions
      8. 8.6.8  Offset Calibration (OFCALx) Registers (address = 07h, 08h, 09h) [reset = 00h, 00h, 00h]
        1. Table 35. OFCAL0, OFCAL1, OFCAL2 Registers Field Description
      9. 8.6.9  Full-Scale Calibration (FSCALx) Registers (address = 0Ah, 0Bh, 0Ch) [reset = 00h, 00h, 40h]
        1. Table 36. FSCAL0, FSCAL1, FSCAL2 Registers Field Description
      10. 8.6.10 Reserved (RESERVED) Register (address = 0Dh) [reset = FFh]
        1. Table 37. RESERVED Register Field Descriptions
      11. 8.6.11 Reserved (RESERVED) Register (address = 0Eh) [reset = 00h]
        1. Table 38. RESERVED Register Field Descriptions
      12. 8.6.12 Reserved (RESERVED) Register (address = 0Fh) [reset = 00h]
        1. Table 39. RESERVED Register Field Descriptions
      13. 8.6.13 PGA Configuration (PGA) Register (address = 10h) [reset = 00h]
        1. Table 40. PGA Register Field Descriptions
      14. 8.6.14 Input Multiplexer (INPMUX) Register (address = 11h) [reset = FFh]
        1. Table 41. INPMUX Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Range
      2. 9.1.2 Input Overload
      3. 9.1.3 Unused Inputs and Outputs
      4. 9.1.4 Multiplexed 2-Bridge Input Example
      5. 9.1.5 AC-Bridge Excitation Example
      6. 9.1.6 Serial Interface and Digital Connections
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Initialization Setup
  10. 10Power Supply Recommendations
    1. 10.1 Power-Supply Decoupling
    2. 10.2 Analog Power-Supply Clamp
    3. 10.3 Power-Supply Sequencing
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息
  14. 重要声明
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DATA SHEET

适用于桥式传感器的 ADS1235 精密 3 通道差动输入 7200SPS 24 位 Δ-Σ ADC

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 24 位高精度 ADC
    • 120,000 无噪声计数
      （10mV 输入、10SPS）
    • 偏移漂移：1nV/°C
    • 增益漂移：0.5ppm/°C
  • 三个差动输入或五个单端输入
  • 两个基准输入
  • 宽输入电压范围：±7mV 至 ±5V
  • 低噪声 PGA，增益：1、64 和 128
  • 数据速率：2.5SPS 至 7200SPS
  • 交流或直流电桥激励选项
  • 可实现零温漂运行的斩波模式
  • 同步 50Hz 和 60Hz 抑制模式
  • 单周期稳定模式
  • 缺少基准输入监控器
  • 信号超范围监控器
  • 温度传感器
  • 循环冗余校验 (CRC)
  • 5V 或 ±2.5V 电源

2 应用

  • 称重秤和应变计数字转换器
  • 动态称重系统
  • 压力测量
  • 过程分析

3 说明

ADS1235 是一款具有集成式可编程增益放大器 (PGA) 的精密 7200SPS Δ-Σ 模数转换器 (ADC)。此器件还包括诊断 特性 ，如 PGA 超范围和基准监控器。该 ADC 可为高度精密的设备（包括称重秤、应变计和电阻式压力传感器）提供高准确度的零温漂转换数据。

该 ADC 具有信号和基准多路复用器，可支持三个差动信号输入和两个基准输入。该 ADC 还包括可提供 1、64 和 128 的增益的低噪声 PGA。该 ADC 还包括 24 位 ΔΣ 调制器和可编程数字滤波器。

PGA 的高阻抗输入 (1GΩ) 可减小由传感器负载导致的测量误差。

该 ADC 支持交流电桥激励，可消除由传感器布线导致的温漂误差。该 ADC 会提供用于交流激励运行的时钟控制信号。

灵活的数字滤波器可针对单周期稳定转换进行编程，而且能够同时提供 50Hz 和 60Hz 线路周期抑制。

ADS1235 采用薄型 5mm × 5mm QFN 封装，额定温度范围为 –40°C 至 +125°C。

器件信息(1)

器件型号 封装 封装尺寸（标称值）
ADS1235 VQFN (32) 5.0mm × 5.0mm
  1. 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。

Device Images

框图

ADS1235 ads1235-block-diagram.gif

ADC 转换噪声

ADS1235 D109_SBAS824.gif

4 修订历史记录

日期 修订版本 说明
2018 年9 月 * 初始发行版。

5 Pin Configuration and Functions

RHB Package
VQFN-32
Top View

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 NC — No connection; float or connect to AVSS
2 CAPP Analog output PGA output P; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN
3 CAPN Analog output PGA output N; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN
4 AVDD Analog Positive analog power supply
5 AVSS Analog Negative analog power supply
6 NC — No connection - solder the pin for mechanical support, float or connect to DGND
7 PWDN Digital input Power down, active low
8 RESET Digital input Reset, active low
9 START Digital input Start conversion control, active high
10 CS Digital input Serial interface chip select, active low
11 SCLK Digital Input Serial interface shift clock
12 DIN Digital Input Serial interface data input
13 DRDY Digital output Data ready indicator, active low
14 DOUT/DRDY Digital output Dual function serial interface data output and active-low data ready indicator
15 BYPASS Analog output Internal subregulator bypass; connect a 1-µF capacitor to DGND
16 DGND Digital Digital ground
17 DVDD Digital Digital power supply
18 CLKIN Digital input 1) Internal oscillator: connect to DGND, 2) External clock: connect clock input
19-24 NC — No connection - solder the pin for mechanical support, float or connect to DGND
25 AIN5 Analog input Analog input 5
26 AIN4 Analog input Analog input 4
27 AIN3 Analog input/output Analog input 3, GPIO3, ACX2
28 AIN2 Analog input/output Analog input 2, GPIO2, ACX1
29 AIN1 Analog input/output Analog input 1, GPIO1, ACX2, Reference input 1 negative
30 AIN0 Analog input/output Analog input 0, GPIO0, ACX1, Reference input 1 positive
31 REFN0 Analog input/output Reference input 0 negative
32 REFP0 Analog input/output Reference input 0 positive
— Thermal Pad — Exposed thermal pad - solder the pad for mechanical support; connect to AVSS.

6 Specifications

6.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
Power supply voltage AVDD to AVSS –0.3 7 V
AVSS to DGND –3 0.3
DVDD to DGND –0.3 7
Analog input voltage AINx, REFP0, REFN0 AVSS – 0.3 AVDD + 0.3 V
Digital input voltage CS, SCLK, DIN, DOUT/DRDY, DRDY, START, RESET, PWDN, CLKIN DGND – 0.3 DVDD + 0.3 V
Input Current Continuous, all pins except power-supply pins(2) –10 10 mA
Temperature Junction, TJ 150 °C
Storage, Tstg –60 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input and output pins are diode-clamped to the internal power supplies. Limit the input current to 10 mA in the event the analog input voltage exceeds AVDD + 0.3 V or AVSS – 0.3 V, or if the digital input voltage exceeds DVDD + 0.3 V or DGND – 0.3 V.

 
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