ZHCSIA2 May 2018 LMX2572LP
PRODUCTION DATA.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RAMP0_INC[29:16] | 0 | RAMP0_DLY | |||||||||||||
| R/W-0h | R/W-0h | R/W-0h | |||||||||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15 - 2 | RAMP0_INC[29:16] | R/W | 0h | Upper 14 bits of RAMP0_INC.
RAMP0_INC sets the 2's compliment of the number added to the fractional numerator on every ramp cycle. |
| 1 | R/W | 0h | Program 0h to this field. | |
| 0 | RAMP0_DLY | R/W | 0h | When enabled, increases RAMP0 length by basing the ramp clock on two phase detector cycles instead of one.
0: Ramp clock = 1 fPD cycle 1: Ramp clock = 2 fPD cycles |