ZHCSH20 October   2017 TAS5634

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Audio Specification Stereo (BTL)
    6. 7.6 Audio Specifications Mono (PBTL)
    7. 7.7 Audio Specification 4 Channels (SE)
    8. 7.8 Electrical Characteristics
    9. 7.9 Typical Characteristics
      1. 7.9.1 BTL Configuration
      2. 7.9.2 PBTL Configuration
      3. 7.9.3 SE Configuration
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Closed-Loop Architecture
      2. 8.3.2  Power Supplies
        1. 8.3.2.1 BST, Bootstrap Supply
        2. 8.3.2.2 PVDD, Output Stage Power Supply
        3. 8.3.2.3 GVDD, Gate-Drive Power Supply
        4. 8.3.2.4 VDD Supply, Internal Regulators (DVDD and AVDD)
      3. 8.3.3  System Power-Up / Power-Down Sequence
        1. 8.3.3.1 Powering Up
        2. 8.3.3.2 Powering Down
      4. 8.3.4  Startup and Shutdown Ramp Sequence (C_START)
      5. 8.3.5  Device Protection System
      6. 8.3.6  Overload and Short Circuit Current Protection
      7. 8.3.7  DC Speaker Protection
      8. 8.3.8  Pin-To-Pin Short Circuit Protection (PPSC)
      9. 8.3.9  Overtemperature Protection
      10. 8.3.10 Overtemperature Warning, OTW
      11. 8.3.11 Undervoltage Protection (UVP) and Power-On Reset (POR)
      12. 8.3.12 Error Reporting
      13. 8.3.13 Fault Handling
      14. 8.3.14 System Design Consideration
    4. 8.4 Device Functional Modes
      1. 8.4.1 Stereo, Bridge-tied Load (BTL)
      2. 8.4.2 Mono, Paralleled Bridge-tied Load (PBTL)
      3. 8.4.3 4-Channel, Single-ended (SE)
      4. 8.4.4 BD Modulation
      5. 8.4.5 Device Reset
      6. 8.4.6 Unused Output Channels
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical BTL Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Pin Connections
        4. 9.2.1.4 Application Curves
      2. 9.2.2 Typical PBTL Configuration
        1. 9.2.2.1 Application Curves
      3. 9.2.3 Typical SE Configuration
        1. 9.2.3.1 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supplies
    2. 10.2 Bootstrap Supply
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material Recommendation
      2. 11.1.2 PVDD Capacitor Recommendation
      3. 11.1.3 Decoupling Capacitor Recommendation
      4. 11.1.4 Circuit Component Requirements
      5. 11.1.5 Printed Circuit Board Requirements
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 接收文档更新通知
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

Device Comparison

DEVICE NAME DESCRIPTION PVDD VOLTAGE (Nom.) RDrain-to-Source
TAS5612LA 125 W Stereo / 250 W Mono HD Digital-Input Power Stage 32.5 V 60 mΩ
TAS5614LA 150 W Stereo / 300 W Mono HD Digital-Input Power Stage 36 V 60 mΩ
TAS5624A 200 W Stereo / 400 W Mono HD Digital-Input Power Stage 36 V 40 mΩ
TAS5634 300 W Stereo / 600 W Mono HD Digital-Input Power Stage 58 V 80 mΩ