ZHCSGO9C June 2017 – September 2018 MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471
PRODUCTION DATA.
德州仪器 (TI) MSP430FR604x 和 MSP430FR603x 系列超声波感应和测量 SoC 是针对水表和热量计进行了优化的强大且高度集成的微控制器 (MCU)。MSP430FR604x MCU 具有集成的超声波感应解决方案 (USS) 模块,该模块可在多种流速条件下提供高精度。USS 模块高度集成,需要的外部组件极少,因而有助于实现超低功耗计量并降低系统成本。MSP430FR604x 和 MSP430FR603x MCU 采用集成式低功耗加速器 (LEA),可实现基于高速 ADC 的信号采集以及后续优化数字信号处理,为电池供电型计量应用提供了一款理想的超低功耗、高精度计量 解决方案。
USS 模块包括可编程脉冲发生器 (PPG) 和具有低阻抗输出驱动器的物理接口 (PHY),以实现最佳传感器激励和准确的阻抗匹配,从而在零流量漂移 (ZFD) 方面达到最佳效果。该模块还包含可编程增益放大器 (PGA) 和高速 12 位 8Msps Σ-Δ ADC (SDHS),便于通过行业标准超声波传感器实现精确的信号采集。
此外,MSP430FR604x 和 MSP430FR603x MCU 还集成了其他外设,可提高系统在计量方面的集成度。这些器件还具有计量测试接口 (MTIF) 模块,能够通过脉冲生成来指示仪表测量的流量。MSP430FR604x 和 MSP430FR603x MCU 还具有片上 8 通道多路复用器 LCD 驱动器、RTC、12 位 SAR ADC、模拟比较器、高级加密加速器 (AES256) 和循环冗余校验 (CRC) 模块。
MSP430FR604x 和 MSP430FR603x MCU 由一款广泛的硬件和软件生态系统提供支持,随附参考设计和代码示例,以便用户快速开展设计。开发套件包括 MSP-TS430PZ100E 100 引脚目标开发板和 EVM430-FR6047 超声波水流量计 EVM。TI 还提供免费软件,包括超声波感应设计中心、超声波感应软件库和 MSP430Ware™ 软件。
TI 的 MSP430 超低功耗 (ULP) FRAM 微控制器平台将独特的嵌入式 FRAM 和全面的超低功耗系统架构相结合,从而使系统设计人员能够在降低能耗的同时提升性能。FRAM 技术将 RAM 的低能耗快速写入、灵活性和耐用性与闪存的非易失性相结合。
Figure 1-1 和 Figure 1-2 显示了器件的功能框图。
NOTE:
该器件具备 8KB RAM,其中 4KB RAM 与 LEA 子系统共享。NOTE:
该器件具备 8KB RAM,其中 4KB RAM 与 LEA 子系统共享。Changes from December 16, 2017 to September 25, 2018
Table 3-1 summarizes the available family members.
DEVICE | FRAM
(KB) |
SRAM
(KB) |
CLOCK SYSTEM | LEA | USS
USSXT |
MTIF | ADC12_B | Comp_E | Timer_A(1) | Timer_B(2) | eUSCI | AES | BSL | I/Os | PACKAGE | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
A(3) | B(4) | |||||||||||||||
MSP430FR6047 | 256 | 8 | DCO
HFXT LFXT |
Yes | Yes | Yes | 16 ext, 2 int ch. | 16 ch. | 3, 3(5)
2, 2,2(6) |
7 | 4 | 2 | Yes | UART | 76 | 100 PZ (LQFP) |
MSP430FR60471 | 256 | 8 | DCO
HFXT LFXT |
Yes | Yes | Yes | 16 ext, 2 int ch. | 16 ch. | 3, 3(5)
2, 2,2(6) |
7 | 4 | 2 | Yes | I2C | 76 | 100 PZ (LQFP) |
MSP430FR6037 | 256 | 8 | DCO
HFXT LFXT |
Yes | No | Yes | 16 ext, 2 int ch. | 16 ch. | 3, 3(5)
2, 2,2(6) |
7 | 4 | 2 | Yes | UART | 76 | 100 PZ (LQFP) |
MSP430FR60371 | 256 | 8 | DCO
HFXT LFXT |
Yes | No | Yes | 16 ext, 2 int ch. | 16 ch. | 3, 3(5)
2, 2,2(6) |
7 | 4 | 2 | Yes | I2C | 76 | 100 PZ (LQFP) |
MSP430FR6045 | 128 | 8 | DCO
HFXT LFXT |
Yes | Yes | Yes | 16 ext, 2 int ch. | 16 ch. | 3, 3(5)
2, 2,2(6) |
7 | 4 | 2 | Yes | UART | 76 | 100 PZ (LQFP) |
MSP430FR6035 | 128 | 8 | DCO
HFXT LFXT |
Yes | No | Yes | 16 ext, 2 int ch. | 16 ch. | 3, 3(5)
2, 2,2(6) |
7 | 4 | 2 | Yes | UART | 76 | 100 PZ (LQFP) |
For information about other devices in this family of products or related products, see the following links.
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Figure 4-1 and Figure 4-2 show the pinouts of the 100-pin PZ packages.
Table 4-1 lists the attributes of each pin.
PIN NUMBER | SIGNAL NAME(1)(4) | SIGNAL TYPE(2) | BUFFER TYPE(3) | POWER SOURCE(5) | RESET STATE AFTER BOR(7) |
---|---|---|---|---|---|
1 | P2.2 | I/O | LVCMOS | DVCC | OFF |
COUT | O | LVCMOS | DVCC | – | |
UCA0CLK | I/O | LVCMOS | DVCC | – | |
A14 | I | Analog | DVCC | – | |
C14 | I | Analog | DVCC | – | |
2 | P2.3 | I/O | LVCMOS | DVCC | OFF |
TA0.0 | I/O | LVCMOS | DVCC | – | |
UCA0STE | I/O | LVCMOS | DVCC | – | |
A15 | I | Analog | DVCC | – | |
C15 | I | Analog | DVCC | – | |
3 | P1.0 | I/O | LVCMOS | DVCC | OFF |
UCA1CLK | I/O | LVCMOS | DVCC | – | |
TA1.0 | I/O | LVCMOS | DVCC | – | |
A0 | I | Analog | DVCC | – | |
C0 | I | Analog | DVCC | – | |
VREF- | O | Analog | DVCC | – | |
VeREF- | I | Analog | DVCC | – | |
4 | P1.1 | I/O | LVCMOS | DVCC | OFF |
UCA1STE | I/O | LVCMOS | DVCC | – | |
TA4.0 | I/O | LVCMOS | DVCC | – | |
A1 | I | Analog | DVCC | – | |
C1 | I | Analog | DVCC | – | |
VREF+ | O | Analog | DVCC | – | |
VeREF+ | I | Analog | DVCC | – | |
5 | AVSS2 | P | Power | – | N/A |
6 | PJ.4 | I/O | LVCMOS | DVCC | OFF |
LFXIN | I | Analog | DVCC | – | |
7 | PJ.5 | I/O | LVCMOS | DVCC | OFF |
LFXOUT | O | Analog | DVCC | – | |
8 | AVSS3 | P | Power | – | N/A |
9 | PJ.6 | I/O | LVCMOS | DVCC | – |
HFXIN | I | Analog | DVCC | – | |
10 | PJ.7 | I/O | LVCMOS | DVCC | OFF |
HFXOUT | O | Analog | DVCC | – | |
11 | AVSS4 | P | Power | – | N/A |
12 | P1.4 | I/O | LVCMOS | DVCC | OFF |
TB0.4 | I/O | LVCMOS | DVCC | – | |
UCB0STE | I/O | LVCMOS | DVCC | – | |
A2 | I | Analog | DVCC | – | |
C2 | I | Analog | DVCC | – | |
13 | P1.5 | I/O | LVCMOS | DVCC | OFF |
TB0.5 | I/O | LVCMOS | DVCC | – | |
UCB0CLK | I/O | LVCMOS | DVCC | – | |
A3 | I | Analog | DVCC | – | |
C3 | I | Analog | DVCC | – | |
14 | P1.6 | I/O | LVCMOS | DVCC | OFF |
UCB0SIMO | I/O | LVCMOS | DVCC | – | |
UCB0SDA | I/O | LVCMOS | DVCC | – | |
A4 | I | Analog | DVCC | – | |
C4 | I | Analog | DVCC | – | |
15 | P1.7 | I/O | LVCMOS | DVCC | OFF |
USSTRG | I | LVCMOS | DVCC | – | |
UCB0SOMI | I/O | LVCMOS | DVCC | – | |
UCB0SCL | I/O | LVCMOS | DVCC | – | |
A5 | I | Analog | DVCC | – | |
C5 | I | Analog | DVCC | – | |
16 | P2.0 | I/O | LVCMOS | DVCC | OFF |
UCA0TXD | O | LVCMOS | DVCC | – | |
UCA0SIMO | I/O | LVCMOS | DVCC | – | |
A6 | I | Analog | DVCC | – | |
C6 | I | Analog | DVCC | – | |
17 | P2.1 | I/O | LVCMOS | DVCC | OFF |
UCA0RXD | I | LVCMOS | DVCC | – | |
UCA0SOMI | I/O | LVCMOS | DVCC | – | |
A7 | I | Analog | DVCC | – | |
C7 | I | Analog | DVCC | – | |
18 | P1.2 | I/O | LVCMOS | DVCC | OFF |
UCA1TXD | O | LVCMOS | DVCC | – | |
UCA1SIMO | I/O | LVCMOS | DVCC | – | |
A8 | I | Analog | DVCC | – | |
C8 | I | Analog | DVCC | – | |
19 | P1.3 | I/O | LVCMOS | DVCC | OFF |
UCA1RXD | I | LVCMOS | DVCC | – | |
UCA1SOMI | I/O | LVCMOS | DVCC | – | |
A9 | I | Analog | DVCC | – | |
C9 | I | Analog | DVCC | – | |
20 | TEST | I | LVCMOS | DVCC | PD |
SBWTCK | I | LVCMOS | DVCC | – | |
21 | RST | I/O | LVCMOS | DVCC | PU |
NMI | I | LVCMOS | DVCC | – | |
SBWTDIO | I/O | LVCMOS | DVCC | – | |
22 | PJ.0 | I/O | LVCMOS | DVCC | OFF |
TDO | O | LVCMOS | DVCC | – | |
ACLK | O | LVCMOS | DVCC | – | |
SRSCG1 | O | LVCMOS | DVCC | – | |
DMAE0 | I | LVCMOS | DVCC | – | |
C10 | I | Analog | DVCC | – | |
23 | PJ.1 | I/O | LVCMOS | DVCC | OFF |
TDI | I | LVCMOS | DVCC | – | |
TCLK | I | LVCMOS | DVCC | – | |
SMCLK | O | LVCMOS | DVCC | – | |
SRSCG0 | O | LVCMOS | DVCC | – | |
TA4CLK | I | LVCMOS | DVCC | – | |
C11 | I | Analog | DVCC | – | |
24 | PJ.2 | I/O | LVCMOS | DVCC | OFF |
TMS | I | LVCMOS | DVCC | – | |
MCLK | O | LVCMOS | DVCC | – | |
SROSCOFF | O | LVCMOS | DVCC | – | |
TB0OUTH | I | LVCMOS | DVCC | – | |
C12 | I | Analog | DVCC | – | |
25 | PJ.3 | I/O | LVCMOS | DVCC | OFF |
TCK | I | LVCMOS | DVCC | – | |
RTCCLK | O | LVCMOS | DVCC | – | |
SRCPUOFF | O | LVCMOS | DVCC | – | |
TB0.6 | I/O | LVCMOS | DVCC | – | |
C13 | I | Analog | DVCC | – | |
26 | DVSS1 | P | Power | – | N/A |
27 | DVCC1 | P | Power | – | N/A |
28 | P2.4 | I/O | LVCMOS | DVCC | OFF |
TA0CLK | I | LVCMOS | DVCC | – | |
TB0CLK | I | LVCMOS | DVCC | – | |
TA1CLK | I | LVCMOS | DVCC | – | |
S32 | O | Analog | DVCC | – | |
29 | P2.5 | I/O | LVCMOS | DVCC | OFF |
TA4.0 | I/O | LVCMOS | DVCC | – | |
S31 | O | Analog | DVCC | – | |
30 | P2.6 | I/O | LVCMOS | DVCC | OFF |
TA4.1 | I/O | LVCMOS | DVCC | – | |
S30 | O | Analog | DVCC | – | |
31 | P3.0 | I/O | LVCMOS | DVCC | OFF |
TB0.0 | I/O | LVCMOS | DVCC | – | |
S29 | O | Analog | DVCC | – | |
32 | P3.1 | I/O | LVCMOS | DVCC | OFF |
TB0.1 | O | LVCMOS | DVCC | – | |
S28 | O | Analog | DVCC | – | |
33 | P3.2 | I/O | LVCMOS | DVCC | OFF |
TB0.2 | O | LVCMOS | DVCC | – | |
S27 | O | Analog | DVCC | – | |
34 | P3.3 | I/O | LVCMOS | DVCC | OFF |
TB0.3 | I/O | LVCMOS | DVCC | – | |
S26 | O | Analog | DVCC | – | |
35 | P3.4 | I/O | LVCMOS | DVCC | OFF |
TB0OUTH | I | LVCMOS | DVCC | – | |
S25 | O | Analog | DVCC | – | |
36 | P3.5 | I/O | LVCMOS | DVCC | OFF |
TB0.4 | I/O | LVCMOS | DVCC | – | |
S24 | O | Analog | DVCC | – | |
37 | P3.6 | I/O | LVCMOS | DVCC | OFF |
TB0.5 | I/O | LVCMOS | DVCC | – | |
S23 | O | Analog | DVCC | – | |
38 | P3.7 | I/O | LVCMOS | DVCC | OFF |
TB0.6 | I/O | LVCMOS | DVCC | – | |
S22 | O | Analog | DVCC | – | |
39 | P2.7 | I/O | LVCMOS | DVCC | OFF |
TA0.0 | I/O | LVCMOS | DVCC | – | |
S21 | O | Analog | DVCC | – | |
40 | P9.0 | I/O | LVCMOS | DVCC | OFF |
TA1.0 | I/O | LVCMOS | DVCC | – | |
S20 | O | Analog | DVCC | – | |
41 | P9.1 | I/O | LVCMOS | DVCC | OFF |
SMCLK | O | LVCMOS | DVCC | – | |
S19 | O | Analog | DVCC | – | |
42 | P9.2 | I/O | LVCMOS | DVCC | OFF |
MCLK | O | LVCMOS | DVCC | – | |
S18 | O | Analog | DVCC | – | |
43 | P9.3 | I/O | LVCMOS | DVCC | OFF |
ACLK | O | LVCMOS | DVCC | – | |
S17 | O | Analog | DVCC | – | |
44 | P4.0 | I/O | LVCMOS | DVCC | OFF |
RTCCLK | O | LVCMOS | DVCC | – | |
S16 | O | Analog | DVCC | – | |
45 | P4.1 | I/O | LVCMOS | DVCC | OFF |
UCA0CLK | I/O | LVCMOS | DVCC | – | |
S15 | O | Analog | DVCC | – | |
46 | P4.2 | I/O | LVCMOS | DVCC | OFF |
UCA0STE | I/O | LVCMOS | DVCC | – | |
S14 | O | Analog | DVCC | – | |
47 | P4.3 | I/O | LVCMOS | DVCC | OFF |
UCA0TXD | O | LVCMOS | DVCC | – | |
UCA0SIMO | I/O | LVCMOS | DVCC | – | |
S13 | O | Analog | DVCC | – | |
48 | P4.4 | I/O | LVCMOS | DVCC | OFF |
UCA0RXD | I | LVCMOS | DVCC | – | |
UCA0SOMI | I/O | LVCMOS | DVCC | – | |
S12 | O | Analog | DVCC | – | |
49 | P4.5 | I/O | LVCMOS | DVCC | OFF |
TA0CLK | I | LVCMOS | DVCC | – | |
TA1CLK | I | LVCMOS | DVCC | – | |
S11 | O | Analog | DVCC | – | |
50 | P4.6 | I/O | LVCMOS | DVCC | OFF |
TB0CLK | I | LVCMOS | DVCC | – | |
TA4CLK | I | LVCMOS | DVCC | – | |
S10 | O | Analog | DVCC | – | |
51 | DVSS2 | P | Power | – | N/A |
52 | DVCC2 | P | Power | – | N/A |
53 | P4.7 | I/O | LVCMOS | DVCC | OFF |
DMAE0 | I | LVCMOS | DVCC | – | |
S9 | O | Analog | DVCC | – | |
54 | P5.0 | I/O | LVCMOS | DVCC | OFF |
UCA2TXD | O | LVCMOS | DVCC | – | |
UCA2SIMO | I/O | LVCMOS | DVCC | – | |
S8 | O | Analog | DVCC | – | |
55 | P5.1 | I/O | LVCMOS | DVCC | OFF |
UCA2RXD | I | LVCMOS | DVCC | – | |
UCA2SOMI | I/O | LVCMOS | DVCC | – | |
S7 | O | Analog | DVCC | – | |
56 | P5.2 | I/O | LVCMOS | DVCC | OFF |
UCA2CLK | I/O | LVCMOS | DVCC | – | |
S6 | O | Analog | DVCC | – | |
57 | P5.3 | I/O | LVCMOS | DVCC | OFF |
UCA2STE | I/O | LVCMOS | DVCC | – | |
S5 | O | Analog | DVCC | – | |
58 | P5.4 | I/O | LVCMOS | DVCC | OFF |
UCB1CLK | I/O | LVCMOS | DVCC | – | |
S4 | O | Analog | DVCC | – | |
59 | P5.5 | I/O | LVCMOS | DVCC | OFF |
TA0CLK | I | LVCMOS | DVCC | – | |
UCB1SIMO | I/O | LVCMOS | DVCC | – | |
UCB1SDA | I/O | LVCMOS | DVCC | – | |
S3 | O | Analog | DVCC | – | |
60 | P5.6 | I/O | LVCMOS | DVCC | OFF |
UCB1SOMI | I/O | LVCMOS | DVCC | – | |
UCB1SCL | I/O | LVCMOS | DVCC | – | |
S2 | O | Analog | DVCC | – | |
61 | P5.7 | I/O | LVCMOS | DVCC | OFF |
UCB1STE | I/O | LVCMOS | DVCC | – | |
S1 | O | Analog | DVCC | – | |
62 | P6.0 | I/O | LVCMOS | DVCC | OFF |
COUT | I | LVCMOS | DVCC | – | |
S0 | O | Analog | DVCC | – | |
63 | P6.4 | I/O | LVCMOS | DVCC | OFF |
COM0 | O | Analog | DVCC | – | |
64 | P6.5 | I/O | LVCMOS | DVCC | OFF |
COM1 | O | Analog | DVCC | – | |
65 | P6.6 | I/O | LVCMOS | DVCC | OFF |
COM2 | O | Analog | DVCC | – | |
S38 | O | Analog | DVCC | – | |
66 | P6.7 | I/O | LVCMOS | DVCC | OFF |
COM3 | O | Analog | DVCC | – | |
S37 | O | Analog | DVCC | – | |
67 | P7.0 | I/O | LVCMOS | DVCC | OFF |
UCA2TXD | O | LVCMOS | DVCC | – | |
UCA2SIMO | I/O | LVCMOS | DVCC | – | |
ACLK | O | LVCMOS | DVCC | – | |
COM4 | O | Analog | DVCC | – | |
S36 | O | Analog | DVCC | – | |
68 | P7.1 | I/O | LVCMOS | DVCC | OFF |
UCA2RXD | I | LVCMOS | DVCC | – | |
UCA2SOMI | I/O | LVCMOS | DVCC | – | |
SMCLK | O | LVCMOS | DVCC | – | |
COM5 | O | Analog | DVCC | – | |
S35 | O | Analog | DVCC | – | |
69 | P7.2 | I/O | LVCMOS | DVCC | OFF |
UCA2CLK | I/O | LVCMOS | DVCC | – | |
TB0.0 | I/O | LVCMOS | DVCC | – | |
COM6 | O | Analog | DVCC | – | |
S34 | O | Analog | DVCC | – | |
70 | P7.3 | I/O | LVCMOS | DVCC | OFF |
UCA2STE | I/O | LVCMOS | DVCC | – | |
TB0.1 | I/O | LVCMOS | DVCC | – | |
COM7 | O | Analog | DVCC | – | |
S33 | O | Analog | DVCC | – | |
71 | P6.1 | I/O | LVCMOS | DVCC | OFF |
R03 | I/O | Analog | DVCC | – | |
72 | P6.2 | I/O | LVCMOS | DVCC | OFF |
R13 | I/O | Analog | DVCC | – | |
LCDREF | I | Analog | - | – | |
73 | P6.3 | I/O | LVCMOS | DVCC | OFF |
R23 | I/O | Analog | DVCC | – | |
74 | R33 | I/O | Analog | DVCC | - |
LCDCAP | I/O | Analog | DVCC | – | |
75 | DVSS3 | P | Power | – | N/A |
76 | DVCC3 | P | Power | – | N/A |
77 | P7.4 | I/O | LVCMOS | DVCC | OFF |
TA0.1 | I/O | LVCMOS | DVCC | – | |
MTIF_OUT_IN | I/O | LVCMOS | DVCC | – | |
78 | P7.5 | I/O | LVCMOS | DVCC | OFF |
TA1.1 | I/O | LVCMOS | DVCC | – | |
MTIF_PIN_EN | I | LVCMOS | DVCC | – | |
79 | P8.0 | I/O | LVCMOS | DVCC | OFF |
UCA3STE | I/O | LVCMOS | DVCC | – | |
TB0.2 | I/O | LVCMOS | DVCC | – | |
DMAE0 | I | LVCMOS | DVCC | – | |
80 | P8.1 | I/O | LVCMOS | DVCC | OFF |
UCA3CLK | I/O | LVCMOS | DVCC | – | |
TB0.3 | I/O | LVCMOS | DVCC | – | |
TB0OUTH | I | LVCMOS | DVCC | – | |
81 | P8.2 | I/O | LVCMOS | DVCC | OFF |
UCA3RXD | O | LVCMOS | DVCC | – | |
UCA3SOMI | I/O | LVCMOS | DVCC | – | |
MCLK | O | LVCMOS | DVCC | – | |
82 | P8.3 | I/O | LVCMOS | DVCC | OFF |
UCA3TXD | O | LVCMOS | DVCC | – | |
UCA3SIMO | I/O | LVCMOS | DVCC | – | |
RTCCLK | O | LVCMOS | DVCC | – | |
83 | P7.6 | I/O | LVCMOS | DVCC | OFF |
TA4.1 | I/O | LVCMOS | DVCC | – | |
DMAE0 | I | LVCMOS | DVCC | – | |
COUT | O | LVCMOS | DVCC | – | |
84 | P7.7 | I/O | LVCMOS | DVCC | OFF |
TA0.2 | I/O | LVCMOS | DVCC | – | |
TB0OUTH | I | LVCMOS | DVCC | – | |
COUT | O | LVCMOS | DVCC | – | |
85 | CH1_IN | I | Analog | PVCC | – |
86 | CH1_OUT | O | Analog | PVCC | – |
87 | PVSS | P | Power | – | N/A |
88 | PVCC | P | Power | – | N/A |
89 | PVSS | P | Power | – | N/A |
90 | CH0_OUT | O | Analog | PVCC | – |
91 | CH0_IN | I | Analog | PVCC | – |
92 | P8.4 | I/O | LVCMOS | DVCC | OFF |
UCB1CLK | I/O | LVCMOS | DVCC | – | |
TA1.2 | I/O | LVCMOS | DVCC | – | |
A10 | I | Analog | DVCC | – | |
93 | P8.5 | I/O | LVCMOS | DVCC | OFF |
UCB1SIMO | I/O | LVCMOS | DVCC | – | |
UCB1SDA | I/O | LVCMOS | DVCC | – | |
A11 | I | Analog | DVCC | – | |
94 | P8.6 | I/O | LVCMOS | DVCC | OFF |
UCB1SOMI | I/O | LVCMOS | DVCC | – | |
UCB1SCL | I/O | LVCMOS | DVCC | – | |
A12 | I | Analog | DVCC | – | |
95 | P8.7 | I/O | LVCMOS | DVCC | OFF |
UCB1STE | I/O | LVCMOS | DVCC | – | |
USSXT_BOUT | I/O | LVCMOS | DVCC | – | |
A13 | I | Analog | DVCC | – | |
96 | AVSS5 | P | Power | – | N/A |
97 | USSXTIN(6) | I | Analog | 1.5V | – |
98 | USSXTOUT(6) | O | Analog | 1.5V | – |
99 | AVSS1 | P | Power | – | N/A |
100 | AVCC1 | P | Power | – | N/A |
Table 4-2 describes the signals.
FUNCTION | SIGNAL NAME | PIN NO. | PIN TYPE(1) | DESCRIPTION |
---|---|---|---|---|
PZ | ||||
ADC | A0 | 3 | I | ADC analog input A0 |
A1 | 4 | I | ADC analog input A1 | |
A2 | 12 | I | ADC analog input A2 | |
A3 | 13 | I | ADC analog input A3 | |
A4 | 14 | I | ADC analog input A4 | |
A5 | 15 | I | ADC analog input A5 | |
A6 | 16 | I | ADC analog input A6 | |
A7 | 17 | I | ADC analog input A7 | |
A8 | 18 | I | ADC analog input A8 | |
A9 | 19 | I | ADC analog input A9 | |
A10 | 92 | I | ADC analog input A10 | |
A11 | 93 | I | ADC analog input A11 | |
A12 | 94 | I | ADC analog input A12 | |
A13 | 95 | I | ADC analog input A13 | |
A14 | 1 | I | ADC analog input A14 | |
A15 | 2 | I | ADC analog input A15 | |
VREF+ | 4 | O | Output of positive reference voltage | |
VREF- | 3 | O | Output of negative reference voltage | |
VeREF+ | 4 | I | Input for an external positive reference voltage to the ADC | |
VeREF- | 3 | I | Input for an external negative reference voltage to the ADC | |
Clock | ACLK | 22, 43, 67 | O | ACLK output |
HFXIN | 9 | I | Input for high-frequency crystal oscillator HFXT | |
HFXOUT | 10 | O | Output for high-frequency crystal oscillator HFXT | |
LFXIN | 6 | I | Input for low-frequency crystal oscillator LFXT | |
LFXOUT | 7 | O | Output of low-frequency crystal oscillator LFXT | |
MCLK | 24, 42, 81 | O | MCLK output | |
SMCLK | 23, 41, 68 | O | SMCLK output | |
Comparator | C0 | 3 | I | Comparator input C0 |
C1 | 4 | I | Comparator input C1 | |
C2 | 12 | I | Comparator input C2 | |
C3 | 13 | I | Comparator input C3 | |
C4 | 14 | I | Comparator input C4 | |
C5 | 15 | I | Comparator input C5 | |
C6 | 16 | I | Comparator input C6 | |
C7 | 17 | I | Comparator input C7 | |
C8 | 18 | I | Comparator input C8 | |
C9 | 19 | I | Comparator input C9 | |
C10 | 22 | I | Comparator input C10 | |
C11 | 23 | I | Comparator input C11 | |
C12 | 24 | I | Comparator input C12 | |
C13 | 25 | I | Comparator input C13 | |
C14 | 1 | I | Comparator input C14 | |
C15 | 2 | I | Comparator input C15 | |
COUT | 1, 83, 84 | O | Comparator output | |
DMA | DMAE0 | 22, 79, 83 | I | External DMA trigger |
Debug | SBWTCK | 20 | I | Spy-Bi-Wire input clock |
SBWTDIO | 21 | I/O | Spy-Bi-Wire data input/output | |
SRCPUOFF | 25 | O | Low-power debug: CPU Status register bit CPUOFF | |
SROSCOFF | 24 | O | Low-power debug: CPU Status register bit OSCOFF | |
SRSCG0 | 23 | O | Low-power debug: CPU Status register bit SCG0 | |
SRSCG1 | 22 | O | Low-power debug: CPU Status register bit SCG1 | |
TCK | 25 | I | Test clock | |
TCLK | 23 | I | Test clock input | |
TDI | 23 | I | Test data input | |
TDO | 22 | O | Test data output port | |
TEST | 20 | I | Test mode pin, selects digital I/O on JTAG pins | |
TMS | 24 | I | Test mode select | |
GPIO Port 1 | P1.0 | 3 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P1.1 | 4 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P1.2 | 18 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P1.3 | 19 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P1.4 | 12 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P1.5 | 13 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P1.6 | 14 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P1.7 | 15 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 2 | P2.0 | 16 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P2.1 | 17 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P2.2 | 1 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P2.3 | 2 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P2.4 | 28 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P2.5 | 29 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P2.6 | 30 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P2.7 | 39 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 3 | P3.0 | 31 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P3.1 | 32 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P3.2 | 33 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P3.3 | 34 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P3.4 | 35 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P3.5 | 36 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P3.6 | 37 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P3.7 | 38 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 4 | P4.0 | 44 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P4.1 | 45 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P4.2 | 46 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P4.3 | 47 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P4.4 | 48 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P4.5 | 49 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P4.6 | 50 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P4.7 | 53 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 5 | P5.0 | 54 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P5.1 | 55 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P5.2 | 56 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P5.3 | 57 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P5.4 | 58 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P5.5 | 59 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P5.6 | 60 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P5.7 | 61 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 6 | P6.0 | 62 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P6.1 | 71 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P6.2 | 72 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P6.3 | 73 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P6.4 | 63 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P6.5 | 64 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P6.6 | 65 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P6.7 | 66 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 7 | P7.0 | 67 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P7.1 | 68 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P7.2 | 69 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P7.3 | 70 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P7.4 | 77 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P7.5 | 78 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P7.6 | 83 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P7.7 | 84 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 8 | P8.0 | 79 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P8.1 | 80 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P8.2 | 81 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P8.3 | 82 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P8.4 | 92 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P8.5 | 93 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P8.6 | 94 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P8.7 | 95 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port 9 | P9.0 | 40 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 |
P9.1 | 41 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P9.2 | 42 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
P9.3 | 43 | I/O | General-purpose digital I/O with port interrupt and wakeup from LPMx.5 | |
GPIO Port J | PJ.0 | 22 | I/O | General-purpose digital I/O |
PJ.1 | 23 | I/O | General-purpose digital I/O | |
PJ.2 | 24 | I/O | General-purpose digital I/O | |
PJ.3 | 25 | I/O | General-purpose digital I/O | |
PJ.4 | 6 | I/O | General-purpose digital I/O | |
PJ.5 | 7 | I/O | General-purpose digital I/O | |
PJ.6 | 9 | I/O | General-purpose digital I/O | |
PJ.7 | 10 | I/O | General-purpose digital I/O | |
I2C | UCB0SCL | 15 | I/O | I2C clock for eUSCI_B0 I2C mode |
UCB0SDA | 14 | I/O | I2C data for eUSCI_B0 I2C mode | |
UCB1SCL | 94, 60 | I/O | I2C clock for eUSCI_B1 I2C mode | |
UCB1SDA | 93, 59 | I/O | I2C data for eUSCI_B1 I2C mode | |
LCD | COM0 | 63 | O | LCD common output COM0 for LCD backplane |
COM1 | 64 | O | LCD common output COM1 for LCD backplane | |
COM2 | 65 | O | LCD common output COM2 for LCD backplane | |
COM3 | 66 | O | LCD common output COM3 for LCD backplane | |
COM4 | 67 | O | LCD common output COM4 for LCD backplane | |
COM5 | 68 | O | LCD common output COM5 for LCD backplane | |
COM6 | 69 | O | LCD common output COM6 for LCD backplane | |
COM7 | 70 | O | LCD common output COM7 for LCD backplane | |
LCDCAP | 74 | I/O | LCD capacitor connection
CAUTION: LCDCAP/R33 must be connected to DVSS if not used. |
|
LCDREF | 72 | I | External reference voltage input for regulated LCD voltage | |
R03 | 71 | I/O | Input/output port of lowest analog LCD voltage (V5) | |
R13 | 72 | I/O | Input/output port of third most positive analog LCD voltage (V3 or V4) | |
R23 | 73 | I/O | Input/output port of second most positive analog LCD voltage (V2) | |
R33 | 74 | I/O | Input/output port of most positive analog LCD voltage (V1)
CAUTION: LCDCAP/R33 must be connected to DVSS if not used. |
|
S0 | 62 | O | LCD segment output | |
S1 | 61 | O | LCD segment output | |
S2 | 60 | O | LCD segment output | |
S3 | 59 | O | LCD segment output | |
S4 | 58 | O | LCD segment output | |
S5 | 57 | O | LCD segment output | |
S6 | 56 | O | LCD segment output | |
S7 | 55 | O | LCD segment output | |
S8 | 54 | O | LCD segment output | |
S9 | 53 | O | LCD segment output | |
S10 | 50 | O | LCD segment output | |
S11 | 49 | O | LCD segment output | |
S12 | 48 | O | LCD segment output | |
S13 | 47 | O | LCD segment output | |
S14 | 46 | O | LCD segment output | |
S15 | 45 | O | LCD segment output | |
S16 | 44 | O | LCD segment output | |
S17 | 43 | O | LCD segment output | |
S18 | 42 | O | LCD segment output | |
S19 | 41 | O | LCD segment output | |
S20 | 40 | O | LCD segment output | |
S21 | 39 | O | LCD segment output | |
S22 | 38 | O | LCD segment output | |
S23 | 37 | O | LCD segment output | |
S24 | 36 | O | LCD segment output | |
S25 | 35 | O | LCD segment output | |
S26 | 34 | O | LCD segment output | |
S27 | 33 | O | LCD segment output | |
S28 | 32 | O | LCD segment output | |
S29 | 31 | O | LCD segment output | |
LCD (continued) | S30 | 30 | O | LCD segment output |
S31 | 29 | O | LCD segment output | |
S32 | 28 | O | LCD segment output | |
S33 | 70 | O | LCD segment output | |
S34 | 69 | O | LCD segment output | |
S35 | 68 | O | LCD segment output | |
S36 | 67 | O | LCD segment output | |
S37 | 66 | O | LCD segment output | |
S38 | 65 | O | LCD segment output | |
MTIF | MTIF_PIN_EN | 78 | I | Meter test interface pin enable |
MTIF_OUT_IN | 77 | I/O | Meter test interface input and output | |
Power | AVCC1 | 100 | P | Analog power supply |
AVSS1 | 99 | P | Analog ground supply | |
AVSS2 | 5 | P | Analog ground supply | |
AVSS3 | 8 | P | Analog ground supply | |
AVSS4 | 11 | P | Analog ground supply | |
AVSS5 | 96 | P | Analog ground supply | |
DVCC1 | 27 | P | Digital power supply | |
DVCC2 | 52 | P | Digital power supply | |
DVCC3 | 76 | P | Digital power supply | |
DVSS1 | 26 | P | Digital ground supply | |
DVSS2 | 51 | P | Digital ground supply | |
DVSS3 | 75 | P | Digital ground supply | |
PVCC | 88 | P | USS power supply | |
PVSS | 87, 89 | P | USS ground supply | |
RTC | RTCCLK | 25, 44, 82 | O | RTC clock calibration output |
SPI | UCA0CLK | 1, 45 | I/O | Clock signal input for eUSCI_A0 SPI slave mode
Clock signal output for eUSCI_A0 SPI master mode |
UCA0SIMO | 16, 47 | I/O | Slave in/master out for eUSCI_A0 SPI mode | |
UCA0SOMI | 17, 48 | I/O | Slave out/master in for eUSCI_A0 SPI mode | |
UCA0STE | 2, 46 | I/O | Slave transmit enable for eUSCI_A0 SPI mode | |
UCA1CLK | 3 | I/O | Clock signal input for eUSCI_A1 SPI slave mode
Clock signal output for eUSCI_A1 SPI master mode |
|
UCA1SIMO | 18 | I/O | Slave in/master out for eUSCI_A1 SPI mode | |
UCA1SOMI | 19 | I/O | Slave out/master in for eUSCI_A1 SPI mode | |
UCA1STE | 4 | I/O | Slave transmit enable for eUSCI_A1 SPI mode | |
UCA2CLK | 69, 56 | I/O | Clock signal input for eUSCI_A2 SPI slave mode
Clock signal output for eUSCI_A2 SPI master mode |
|
UCA2SIMO | 67, 54 | I/O | Slave in/master out for eUSCI_A2 SPI mode | |
UCA2SOMI | 68, 55 | I/O | Slave out/master in for eUSCI_A2 SPI mode | |
UCA2STE | 70, 57 | I/O | Slave transmit enable for eUSCI_A2 SPI mode | |
UCA3CLK | 80 | I/O | Clock signal input for eUSCI_A3 SPI slave mode
Clock signal output for eUSCI_A3 SPI master mode |
|
UCA3SIMO | 82 | I/O | Slave in/master out for eUSCI_A3 SPI mode | |
UCA3SOMI | 81 | I/O | Slave out/master in for eUSCI_A3 SPI mode | |
UCA3STE | 79 | I/O | Slave transmit enable for eUSCI_A3 SPI mode | |
UCB0CLK | 13 | I/O | Clock signal input for eUSCI_B0 SPI slave mode
Clock signal output for eUSCI_B0 SPI master mode |
|
UCB0SIMO | 14 | I/O | Slave in/master out for eUSCI_B0 SPI mode | |
UCB0SOMI | 15 | I/O | Slave out/master in for eUSCI_B0 SPI mode | |
UCB0STE | 12 | I/O | Slave transmit enable for eUSCI_B0 SPI mode | |
UCB1CLK | 92, 58 | I/O | Clock signal input for eUSCI_B1 SPI slave mode
Clock signal output for eUSCI_B1 SPI master mode |
|
UCB1SIMO | 93, 59 | I/O | Slave in/master out for eUSCI_B1 SPI mode | |
UCB1SOMI | 94, 60 | I/O | Slave out/master in for eUSCI_B1 SPI mode | |
UCB1STE | 95, 61 | I/O | Slave transmit enable for eUSCI_B1 SPI mode | |
System | NMI | 21 | I | Nonmaskable interrupt input |
RST | 21 | I/O | Reset input active low | |
Timer | TA0.0 | 2 | I/O | TA0 CCR0 capture: CCI0A input, compare: Out0 |
TA0.0 | 39 | I/O | TA0 CCR0 capture: CCI0B input, compare: Out0 | |
TA0.1 | 77 | I/O | TA0 CCR1 capture: CCI1A input, compare: Out1 | |
TA0.2 | 84 | I/O | TA0 CCR2 capture: CCI2A input, compare: Out2 | |
TA0CLK | 28, 49, 59 | I | TA0 input clock | |
TA1.0 | 3 | I/O | TA1 CCR0 capture: CCI0A input, compare: Out0 | |
TA1.0 | 40 | I/O | TA1 CCR0 capture: CCI0B input, compare: Out0 | |
TA1.1 | 78 | I/O | TA1 CCR1 capture: CCI1A input, compare: Out1 | |
TA1.2 | 92 | I/O | TA1 CCR2 capture: CCI2A input, compare: Out2 | |
TA1CLK | 28, 49 | I | TA1 input clock | |
TA4.0 | 4 | I/O | TA4 CCR0 capture: CCI0A input, compare: Out0 | |
TA4.0 | 29 | I/O | TA4 CCR0 capture: CCI0B input, compare: Out0 | |
TA4.1 | 30 | I/O | TA4CCR1 capture: CCI1B input, compare: Out1 | |
TA4.1 | 83 | I/O | TA4 CCR1 capture: CCI1A input, compare: Out1 | |
TA4CLK | 23, 50 | I | TA4 input clock | |
TB0.0 | 31 | I/O | TB0 CCR0 capture: CCI0B input, compare: Out0 | |
TB0.0 | 69 | I/O | TB0 CCR0 capture: CCI0A input, compare: Out0 | |
TB0.1 | 32 | I/O | TB0 CCR1 capture: CCI1A input, compare: Out1 | |
TB0.1 | 70 | O | TB0 CCR1 compare: Out1 | |
TB0.2 | 33 | I/O | TB0 CCR2 capture: CCI2A input, compare: Out2 | |
TB0.2 | 79 | O | TB0 CCR2 compare: Out2 | |
TB0.3 | 34 | I/O | TB0 CCR3 capture: CCI3A input, compare: Out3 | |
TB0.3 | 80 | I/O | TB0 CCR3 capture: CCI3B input, compare: Out3 | |
TB0.4 | 12 | I/O | TB0 CCR4 capture: CCI4A input, compare: Out4 | |
TB0.4 | 36 | I/O | TB0 CCR4 capture: CCI4B input, compare: Out4 | |
TB0.5 | 13 | I/O | TB0 CCR5 capture: CCI5A input, compare: Out5 | |
TB0.5 | 37 | I/O | TB0CCR5 capture: CCI5B input, compare: Out5 | |
TB0.6 | 25 | I/O | TB0 CCR6 capture: CCI6B input, compare: Out6 | |
TB0.6 | 38 | I/O | TB0 CCR6 capture: CCI6A input, compare: Out6 | |
TB0CLK | 28, 50 | I | TB0 clock input | |
TB0OUTH | 24, 35, 80, 84 | I | Switch all PWM outputs high impedance input – TB0 | |
UART | UCA0RXD | 17, 48 | I | Receive data for eUSCI_A0 UART mode |
UCA0TXD | 16, 47 | O | Transmit data for eUSCI_A0 UART mode | |
UCA1RXD | 19 | I | Receive data for eUSCI_A1 UART mode | |
UCA1TXD | 18 | O | Transmit data for eUSCI_A1 UART mode | |
UCA2RXD | 68, 55 | I | Receive data for eUSCI_A2 UART mode | |
UCA2TXD | 67, 54 | O | Transmit data for eUSCI_A2 UART mode | |
UCA3RXD | 81 | I | Receive data for eUSCI_A3 UART mode | |
UCA3TXD | 82 | O | Transmit data for eUSCI_A3 UART mode | |
USS | USSTRG | 15 | I | USS trigger |
USSXTIN | 97 | I | Input for crystal or resonator of oscillator USSXT | |
USSXTOUT | 98 | O | Output for crystal or resonator of oscillator USSXT | |
USSXT_BOUT | 95 | O | Buffered output clock of USSXT | |
CH0_IN | 91 | I | USS channel 0 RX | |
CH0_OUT | 90 | I/O | USS channel 0 TX | |
CH1_IN | 85 | I | USS channel 1 RX | |
CH1_OUT | 86 | I/O | USS channel 1 TX |
Pin multiplexing for these devices is controlled by both register settings and operating modes (for example, if the device is in test mode). For details of the settings for each pin and diagrams of the multiplexed ports, see Section 6.14.
Table 4-3 describes the buffer types that are referenced in Table 4-1.
BUFFER TYPE (STANDARD) | NOMINAL VOLTAGE | HYSTERESIS | PULLUP (PU)
OR PULLDOWN (PD) |
NOMINAL PU OR PD STRENGTH (µA) | OUTPUT DRIVE STRENGTH (mA) | OTHER CHARACTERISTICS |
---|---|---|---|---|---|---|
Analog(2) | 3.0 V | N | N/A | N/A | N/A | See analog modules in Section 5 for details. |
LVCMOS | 3.0 V | Y(1) | Programmable | See Section 5.13.5. | See Section 5.13.5. | |
Power (DVCC)(3) | 3.0 V | N | N/A | N/A | N/A | SVS enables hysteresis on DVCC. |
Power (AVCC)(3) | 3.0 V | N | N/A | N/A | N/A | |
Power (PVCC)(3) | 3.0 V | N | N/A | N/A | N/A | |
Power (DVSS and AVSS)(3) | 0 V | N | N/A | N/A | N/A |
Table 4-4 lists the correct termination of unused pins.
PIN | POTENTIAL | COMMENT |
---|---|---|
AVCC | DVCC | |
PVCC | DVCC | |
AVSS | DVSS | |
PVSS | DVSS | |
CHx_IN, CHx_OUT | DVSS | |
USSXTIN | DVSS | Do not connect to DVCC, AVCC, or PVCC |
USSXTOUT | Open | |
Px.0 to Px.7 | Open | Switched to port function, output direction (PxDIR.n = 1) |
RST/NMI/SBWTDIO | DVCC or VCC | 47-kΩ pullup or internal pullup selected with 10-nF (2.2-nF(2)) pulldown |
PJ.0/TDO
PJ.1/TDI PJ.2/TMS PJ.3/TCK |
Open | The JTAG pins are shared with general-purpose I/O function (PJ.x). If these pins are not used, set them to port function, output direction. If used as JTAG pins, leave them open. |
TEST | Open | This pin always has an internal pulldown enabled. |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage(3) | At DVCC and AVCC pins | –0.3 | 4.1 | V |
At DVCC, AVCC, and PVCC pins | –0.3 | 4.1 | |||
Voltage difference between DVCC and AVCC pins(2) | ±0.3 | V | |||
Voltage difference among DVCC, AVCC, and PVCC pins(2) | ±0.3 | V | |||
VI | Input voltage(3) | Applied to CHx_IN | –0.3 | 1.65 | V |
Applied to CHx_IN with a duty cycle of 10% over 1 ms | –0.3 | 1.8 | |||
Applied to USSXTIN (USSXTOUT) | –0.3 | 1.5 | |||
Applied to any other pin | –0.3 | VCC + 0.3 V
(4.1 V Max) |
|||
Diode current at any device pin | ±2 | mA | |||
Tstg | Storage temperature (4) | –40 | 125 | °C |