• Menu
  • Product
  • Email
  • PDF
  • Order now

  • LP8863-Q1 具有 6 个 150mA 通道的汽车显示 LED 背光驱动器

    • ZHCSGN5B March   2017  – July 2018 LP8863-Q1

      PRODUCTION DATA.  

  • CONTENTS
  • SEARCH
  • LP8863-Q1 具有 6 个 150mA 通道的汽车显示 LED 背光驱动器
  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     系统效率
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Protection Electrical Characteristics
    7. 7.7  LED Current Sink and LED PWM Electrical Characteristics
    8. 7.8  Power-Line FET and RISENSE Electrical Characteristics
    9. 7.9  Input PWM Electrical Characteristics
    10. 7.10 Boost Converter Electrical Characteristics
    11. 7.11 Oscillator
    12. 7.12 Charge Pump
    13. 7.13 Logic Interface Characteristics
    14. 7.14 Timing Requirements for SPI Interface
    15. 7.15 Timing Requirements for I2C Interface
    16. 7.16 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Interface
      2. 8.3.2 Boost Controller
        1. 8.3.2.1 Boost Adaptive Voltage Control
          1. 8.3.2.1.1 FB Divider Using Two-Resistor Method
          2. 8.3.2.1.2 FB Divider Using Three-Resistor Method
        2. 8.3.2.2 Boost Sync and Spread Spectrum
        3. 8.3.2.3 Boost Output Discharge
      3. 8.3.3 2X Charge Pump
      4. 8.3.4 1.8-V LDO
      5. 8.3.5 LED Current Sinks
        1. 8.3.5.1 LED Output Current Setting
        2. 8.3.5.2 LED Output PWM Clock Generation
        3. 8.3.5.3 LED Output String Configuration
          1. 8.3.5.3.1 Independent Cluster Brightness Control Mode
      6. 8.3.6 Brightness Control
        1. 8.3.6.1 Brightness Control Signal Path
        2. 8.3.6.2 Hybrid Dimming
        3. 8.3.6.3 Sloper
        4. 8.3.6.4 Dither
      7. 8.3.7 Die Temperature Read-Out and Thermal Window Detector
      8. 8.3.8 Protection and Fault Detections
        1. 8.3.8.1 LED Faults
        2. 8.3.8.2 Boost Faults
        3. 8.3.8.3 Power-Line Faults
        4. 8.3.8.4 VDD Undervoltage Fault
        5. 8.3.8.5 Thermal Shutdown
        6. 8.3.8.6 Overview of the Fault/Protection Schemes
    4. 8.4 Device Functional Modes
      1. 8.4.1  State Diagram
      2. 8.4.2  Shutdown
      3. 8.4.3  Device Initialization
      4. 8.4.4  Standby Mode
      5. 8.4.5  Power-line FET Soft Start
      6. 8.4.6  Boost Start-Up
      7. 8.4.7  Normal Mode
      8. 8.4.8  Discharge Mode
      9. 8.4.9  Fault Recovery
      10. 8.4.10 Latch Fault
      11. 8.4.11 Start-Up Sequence
      12. 8.4.12 Shutdown Sequence
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Selection
      2. 8.5.2 SPI Interface
      3. 8.5.3 I2C-Compatible Interface
      4. 8.5.4 Programming Examples
        1. 8.5.4.1 General Configuration Registers
        2. 8.5.4.2 Clearing Fault Interrupts
        3. 8.5.4.3 Disabling Fault Interrupts
        4. 8.5.4.4 Diagnostic Registers
        5. 8.5.4.5 Cluster Mode Configuration and Control Registers
    6. 8.6 Register Maps
      1. 8.6.1 FullMap Registers
        1. 8.6.1.1  BL_MODE Register (Offset = 20h) [reset = 300h]
          1. Table 14. BL_MODE Register Field Descriptions
        2. 8.6.1.2  DISP_BRT Register (Offset = 28h) [reset = 0h]
          1. Table 15. DISP_BRT Register Field Descriptions
        3. 8.6.1.3  GROUPING1 Register (Offset = 30h) [reset = 0h]
          1. Table 16. GROUPING1 Register Field Descriptions
        4. 8.6.1.4  GROUPING2 Register (Offset = 32h) [reset = 0h]
          1. Table 17. GROUPING2 Register Field Descriptions
        5. 8.6.1.5  USER_CONFIG1 Register (Offset = 40h) [reset = 8B0h]
          1. Table 18. USER_CONFIG1 Register Field Descriptions
        6. 8.6.1.6  USER_CONFIG2 Register (Offset = 42h) [reset = 0h]
          1. Table 19. USER_CONFIG2 Register Field Descriptions
        7. 8.6.1.7  INTERRUPT_ENABLE_3 Register (Offset = 4Eh) [reset = 200Ah]
          1. Table 20. INTERRUPT_ENABLE_3 Register Field Descriptions
        8. 8.6.1.8  INTERRUPT_ENABLE_1 Register (Offset = 50h) [reset = A02Ah]
          1. Table 21. INTERRUPT_ENABLE_1 Register Field Descriptions
        9. 8.6.1.9  INTERRUPT_ENABLE_2 Register (Offset = 52h) [reset = 80h]
          1. Table 22. INTERRUPT_ENABLE_2 Register Field Descriptions
        10. 8.6.1.10 INTERRUPT_STATUS_1 Register (Offset = 54h) [reset = 0h]
          1. Table 23. INTERRUPT_STATUS_1 Register Field Descriptions
        11. 8.6.1.11 INTERRUPT_STATUS_2 Register (Offset = 56h) [reset = 0h]
          1. Table 24. INTERRUPT_STATUS_2 Register Field Descriptions
        12. 8.6.1.12 INTERRUPT_STATUS_3 Register (Offset = 58h) [reset = 0h]
          1. Table 25. INTERRUPT_STATUS_3 Register Field Descriptions
        13. 8.6.1.13 JUNCTION_TEMPERATURE Register (Offset = E8h) [reset = 100h]
          1. Table 26. JUNCTION_TEMPERATURE Register Field Descriptions
        14. 8.6.1.14 TEMPERATURE_LIMIT_HIGH Register (Offset = ECh) [reset = 7Dh]
          1. Table 27. TEMPERATURE_LIMIT_HIGH Register Field Descriptions
        15. 8.6.1.15 TEMPERATURE_LIMIT_LOW Register (Offset = EEh) [reset = 69h]
          1. Table 28. TEMPERATURE_LIMIT_LOW Register Field Descriptions
        16. 8.6.1.16 CLUSTER1_BRT Register (Offset = 13Ch) [reset = FFFFh]
          1. Table 29. CLUSTER1_BRT Register Field Descriptions
        17. 8.6.1.17 CLUSTER2_BRT Register (Offset = 148h) [reset = FFFFh]
          1. Table 30. CLUSTER2_BRT Register Field Descriptions
        18. 8.6.1.18 CLUSTER3_BRT Register (Offset = 154h) [reset = FFFFh]
          1. Table 31. CLUSTER3_BRT Register Field Descriptions
        19. 8.6.1.19 CLUSTER4_BRT Register (Offset = 160h) [reset = FFFFh]
          1. Table 32. CLUSTER4_BRT Register Field Descriptions
        20. 8.6.1.20 CLUSTER5_BRT Register (Offset = 16Ch) [reset = FFFFh]
          1. Table 33. CLUSTER5_BRT Register Field Descriptions
        21. 8.6.1.21 BRT_DB_CONTROL Register (Offset = 178h) [reset = 0h]
          1. Table 34. BRT_DB_CONTROL Register Field Descriptions
        22. 8.6.1.22 LED0_CURRENT Register (Offset = 1C2h) [reset = FFFh]
          1. Table 35. LED0_CURRENT Register Field Descriptions
        23. 8.6.1.23 LED1_CURRENT Register (Offset = 1C4h) [reset = FFFh]
          1. Table 36. LED1_CURRENT Register Field Descriptions
        24. 8.6.1.24 LED2_CURRENT Register (Offset = 1C6h) [reset = FFFh]
          1. Table 37. LED2_CURRENT Register Field Descriptions
        25. 8.6.1.25 LED3_CURRENT Register (Offset = 1C8h) [reset = FFFh]
          1. Table 38. LED3_CURRENT Register Field Descriptions
        26. 8.6.1.26 LED4_CURRENT Register (Offset = 1CAh) [reset = FFFh]
          1. Table 39. LED4_CURRENT Register Field Descriptions
        27. 8.6.1.27 LED5_CURRENT Register (Offset = 1CCh) [reset = FFFh]
          1. Table 40. LED5_CURRENT Register Field Descriptions
        28. 8.6.1.28 BOOST_CONTROL Register (Offset = 288h) [reset = 1C0h]
          1. Table 41. BOOST_CONTROL Register Field Descriptions
        29. 8.6.1.29 SHORT_THRESH Register (Offset = 28Ah) [reset = 2882h]
          1. Table 42. SHORT_THRESH Register Field Descriptions
        30. 8.6.1.30 FSM_DIAGNOSTICS Register (Offset = 2A4h) [reset = 0h]
          1. Table 43. FSM_DIAGNOSTICS Register Field Descriptions
        31. 8.6.1.31 PWM_INPUT_DIAGNOSTICS Register (Offset = 2A6h) [reset = 0h]
          1. Table 44. PWM_INPUT_DIAGNOSTICS Register Field Descriptions
        32. 8.6.1.32 PWM_OUTPUT_DIAGNOSTICS Register (Offset = 2A8h) [reset = 0h]
          1. Table 45. PWM_OUTPUT_DIAGNOSTICS Register Field Descriptions
        33. 8.6.1.33 LED_CURR_DIAGNOSTICS Register (Offset = 2AAh) [reset = 0h]
          1. Table 46. LED_CURR_DIAGNOSTICS Register Field Descriptions
        34. 8.6.1.34 ADAPT_BOOST_DIAGNOSTICS Register (Offset = 2ACh) [reset = 0h]
          1. Table 47. ADAPT_BOOST_DIAGNOSTICS Register Field Descriptions
        35. 8.6.1.35 AUTO_DETECT_DIAGNOSTICS Register (Offset = 2AEh) [reset = 0h]
          1. Table 48. AUTO_DETECT_DIAGNOSTICS Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Full Feature Application for Display Backlight
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Inductor Selection
          2. 9.2.1.2.2  Output Capacitor Selection
          3. 9.2.1.2.3  Input Capacitor Selection
          4. 9.2.1.2.4  Charge Pump Output Capacitor
          5. 9.2.1.2.5  Charge Pump Flying Capacitor
          6. 9.2.1.2.6  Output Diode
          7. 9.2.1.2.7  Switching FET
          8. 9.2.1.2.8  Boost Sense Resistor
          9. 9.2.1.2.9  Power-Line FET
          10. 9.2.1.2.10 Input Current Sense Resistor
          11. 9.2.1.2.11 Feedback Resistor Divider
          12. 9.2.1.2.12 Critical Components for Design
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Application With Basic/Minimal Operation
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 SEPIC Mode Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1  Inductor Selection
          2. 9.2.3.2.2  Coupling Capacitor Selection
          3. 9.2.3.2.3  Output Capacitor Selection
          4. 9.2.3.2.4  Input Capacitor Selection
          5. 9.2.3.2.5  Charge Pump Output Capacitor
          6. 9.2.3.2.6  Charge Pump Flying Capacitor
          7. 9.2.3.2.7  Switching FET
          8. 9.2.3.2.8  Output Diode
          9. 9.2.3.2.9  Switching Sense Resistor
          10. 9.2.3.2.10 Power-Line FET
          11. 9.2.3.2.11 Input Current Sense Resistor
          12. 9.2.3.2.12 Feedback Resistor Divider
          13. 9.2.3.2.13 Critical Components for Design
        3. 9.2.3.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 第三方产品免责声明
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息
  14. 重要声明
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

DATA SHEET

LP8863-Q1 具有 6 个 150mA 通道的汽车显示 LED 背光驱动器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 符合汽车类应用的 要求
  • 具有符合 AEC-Q100 标准的下列特性：
    • 器件温度 1 级：-40℃ 至 +125℃ 的环境运行温度范围
  • 输入电压工作范围：3V 至 48V
  • 六路高精度电流阱
    • 电流匹配度为 1%（典型值）
    • 使用 152Hz LED 输出 PWM 频率时，调光比为 32000:1
    • 使用 SPI、I2C 或 PWM 输入时，最高 16 位 LED 调光分辨率
    • 自动检测使用过的 LED 灯串并调整 LED 通道相移
    • 每个通道的独立电流控制
  • 混合 PWM 和电流调光功能
  • 最高 47V 输出电压升压或 SEPIC 直流/直流控制器
    • 开关频率：300kHz 至 2.2MHz
    • 升压扩频功能可降低 EMI
    • 升压同步输入以从外部时钟设置升压开关频率
    • 集成电荷泵支持低 VIN 条件，如冷启动
    • 禁用升压时，输出电压自动放电
  • 详尽的故障诊断

    • 简化原理图

    LP8863-Q1 simpschem_snvsab6.gif

2 应用

  • 为以下应用提供背光：
    • 汽车信息娱乐系统
    • 汽车仪表盘
    • 智能车镜
    • 抬头显示屏 (HUD)
    • 中央信息显示屏 (CID)
    • 音视频导航 (AVN)

3 说明

LP8863-Q1 是带有升压控制器的汽车高效 LED 驱动器。六路高精度电流阱支持相移，它可根据使用的通道数自动调整。可通过 SPI 或 I2C 接口单独和全局控制电流阱亮度；也可以通过 PWM 输入全局控制亮度。

升压控制器具有基于 LED 电流阱余量电压的自适应输出电压控制。该特性可在所有条件下将电压调节到能够满足需要的最低水平，从而更大限度降低功耗。凭借宽范围可调频率，LP8863-Q1 能够避免 AM 无线电频带的干扰。

LP8863-Q1 支持内置混合 PWM 和电流调光，从而降低了 EMI、延长了 LED 使用寿命并提高了总光学效率。

器件信息(1)

器件编号 封装 封装尺寸（标称值）
LP8863-Q1 HTSSOP (38) 9.70mm x 4.40mm
  1. 要了解所有可用封装，请见数据表末尾的可订购产品附录。

系统效率

LP8863-Q1 D007_page1.gif

4 修订历史记录

Changes from A Revision (June 2017) to B Revision

  • Added TI 参考设计顶部导航链接Go
  • Added note "When internal charge pump is disabled and CPUMP pin is used as an input, max rating is 5.5 V same as VDD." Go
  • Added note "When internal charge pump is disabled and CPUMP pin is used as an input, max rating is 5.5V same as VDD." Go
  • Deleted "ƒOSC" row Go
  • Deleted "led_driver_headroom = 01b" Go
  • Changed to "325" from "200" Go
  • Changed to "450" from "400" Go
  • Changed to "18.6" from "18.8" Go
  • Changed to "21.4" from "21.2" Go
  • Added VSDOOL and VSDOOH two rowsGo
  • Changed Data hold time to rising edge of SCLK in SPI Timing Diagram Go
  • Changed to "VDD" from "EN" Go
  • Changed to "90%" from "88%" Go
  • Changed to "1.21 V" from "1.2 V" Go
  • Changed to "1.21 V" from "1.2 V" Go
  • Changed to "1.76 V" from "1.423 V" Go
  • Changed to "1.21 V" from "1.2 V" Go
  • Changed to "ISEL_MAX" from "ISEL_MAX" Go
  • Changed to "1.21 V and 2560" from "1.2 V and 2580" in Equation 11Go
  • Changed to "DITHER_SELECT[2:0]" from "DITHER_SELECT[1:0]" Go
  • Changed to "up to 5 bits" from "3 bits" Go
  • Changed to "has 3 bits enabled (default 011b) from "is disabled" Go
  • Changed to "110 ms" from "1600 milliseconds" Go
  • Changed to "overcurrent" from "undervoltage" Go
  • Changed to "Boost does not start up. Fault is cleared by VDD cycling with correct resistor connection at FSET pin." from "Device starts up using fail-safe values." Go
  • Changed to "400-ms" from "300-ms" Go
  • Changed to "VDD" from "EN" Go
  • Added " For proper operation of discharge function, pull the EN pin before VDD pin. VIN and VDDIO can be set low any time after EN low." Go
  • Changed to "8B0h' from "B0h" Go
  • Changed to "R/W-2h' from 'R/W-0h" Go
  • Changed to "2h" from "0h" Go
  • Changed to "100h" from "0h" Go
  • Changed to "100h" from "0h" Go
  • Changed to "100h" from "0h" Go
  • Changed to "100h" from "0h" Go
  • Changed to "000h - 0FFh = 0 °C to 255 °C, 100h - 1FFh = –256 °C to –1 °C" from "0h = –1 to –255 °C"Go
  • Changed to "000h - 0FFh = 0 °C to 255 °C, 100h - 1FFh = –256 °C to –1 °C" from "0h = –1 to –255 °C" Go
  • Changed to "000h - 0FFh = 0 °C to 255 °C, 100h - 1FFh = –256 °C to –1 °C" from "0h = –1 to –255 °C" Go
  • Changed to "1C0h" from "0h" Go
  • Changed to "1C0h" from "0h" Go
  • Changed to "1C0h" from "0h" Go
  • Changed to "1C0h" from "0h" Go
  • Changed to "2882h" from "882h" Go
  • Changed to "2h" from "0h" Go
  • Changed to "2h" from "0h" Go
  • Changed Description of FSM_LIVE_STATUS Go
  • Changed to "VIN(min) × D / ( ƒSW × L )" from "VIN(min)× D / ƒSW × L"Go
  • Changed to "Current set resistor for 100 mA maximum" from "Maximum current set resistor" Go
  • Changed to "43.5 V" from "40 V" Go
  • Changed to "10-µF" from "10-µH" Go
  • Changed to "Current set resistor for 150 mA max" from "Maximum current set resistor" Go

Changes from * Revision (March 2017) to A Revision

  • 首次公开发布的完整产品说明书Go

5 Device Comparison Table

LP8863-Q1 LP8860-Q1 LP8862-Q1 LP8861-Q1 TPS61193-Q1 TPS61194-Q1 TPS61196-Q1
VIN range 3 V to 48 V 3 V to 48 V 4.5 V to 45 V 4.5 V to 45 V 4.5 V to 45 V 4.5 V to 45 V 8 V to 30 V
Number of LED channels 6 4 2 4 3 4 6
LED current / channel 150 mA 150 mA 160 mA 100 mA 100 mA 100 mA 200 mA
I2C/SPI support Yes Yes No No No No No
SEPIC support Yes No Yes Yes Yes Yes No

6 Pin Configuration and Functions

DCP Package
38-Pin HTSSOP
Top View
LP8863-Q1 pinout-01-rgy-pkg-snvsab6.gif

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 VDD Power Power input for LDO, charge pump, and analog blocks - a 4.7–µF decoupling capacitor is recommended.
2 SD Analog Power line FET control. If unused, leave this pin floating.
3 VSENSE_N Analog Pin for input current sense. If input current sense is not used tie to VSENSE_P.
4 VSENSE_P Analog Pin for OVP/UVLO protection and input current sense.
5 C1N Analog Negative pin for charge pump flying capacitor. If feature not used, leave this pin floating.
6 C1P Analog Positive pin for charge pump flying capacitor. If feature not used, leave this pin floating.
7 CPUMP Power Charge pump output pin. If charge pump is not used connect to VDD. TI recommends a 10–µF decoupling capacitor.
8 CPUMP Power Charge pump output pin. If charge pump is not used connect to VDD.
9 GD Analog Gate driver output for boost FET
10 GD Analog Gate driver output for boost FET
11 PGND Ground Power ground
12 PGND Ground Power ground
13 ISNSGND Ground Current sense resistor GND of boost controller
14 ISNS Analog Boost current sense pin
15 FB Analog Boost feedback input
16 DISCHARGE Analog Boost output voltage discharge pin. Leave floating if unused.
17 LED5 Analog LED current sink output. If unused tie to ground.
18 LED4 Analog LED current sink output. If unused tie to ground.
19 LED3 Analog LED current sink output. If unused tie to ground.
20 LED2 Analog LED current sink output. If unused tie to ground.
21 LED1 Analog LED current sink output. If unused tie to ground.
22 LED0 Analog LED current sink output. If unused tie to ground.
23 ISET Analog LED current setting input
24 EN Input Enable input
25 VDDIO Power Supply input for digital IO pins - a 4.7–µF decoupling capacitor is recommended.
26 INT Output LP8863-Q1 device fault interrupt output, open drain. Requires an external pullup resistor to VDDIO - a 10-kΩ pullup resistor is recommended.
27 IFSEL Input Serial control interface selection: low = SPI, high = I2C
28 BST_SYNC Input Input for synchronizing boost. When synchronization is not used, connect this pin to ground to disable spread spectrum or to VDDIO to enable spread spectrum.
29 SDO_PWM Input/Output IFSEL=GND, slave data output for SPI. IFSEL=VDDIO, PWM input for brightness control. Tie to GND if unused.
30 SDI_SDA Input IFSEL=GND, slave data input for SPI; IFSEL=VDDIO, serial data for I2C
31 SCLK_SCL Input IFSEL=GND, serial clock for SPI; IFSEL=VDDIO, serial clock for I2C
32 SS_ADDRSEL Input IFSEL=GND, slave select for SPI; IFSEL=VDDIO, I2C address selection
33 BST_FSET Analog Resistor for setting boost FSW frequency. Do not leave floating.
34 PWM_FSET Analog Resistor for setting LED PWM frequency. Do not leave floating.
35 NC N/A No connect — leave floating.
36 NC N/A No connect — leave floating.
37 VLDO Power Internal 1.8-V LDO output. Connect bypass capacitor to this pin - a 10–µF decoupling capacitor is recommended.
38 GND Ground Ground for LDO — charge pump and analog blocks
DAP GND_LED Ground LED ground connection

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage on pins V_SENSE_P, VSENSE_N, SD, LED0 to LED5, FB, DISCHARGE -0.3 50 V
VDD, EN, ISNS -0.3 5.5
Voltage on pins VDDIO, SCLK_SCL, SDI_SDA, SDO_PWM, SS_ADDRSEL, INT, IFSEL, BST_FSET, PWM_FSET, ISET -0.3 3.6 V
C1P, C1N, CPUMP(2), GD -0.3 12
VLDO -0.3 2
Thermal Continuous power dissipation Internally limited Internally limited
Ambient temperature -40 125 °C
Junction temperature -40 150 °C
Maximum lead temperature (soldering) 260 °C
Storage temperature, Tstg -65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) When internal charge pump is disabled and CPUMP pin is used as an input, maximum rating is 5.5 V same as VDD.

 
Texas Instruments

© Copyright 1995-2025 Texas Instruments Incorporated. All rights reserved.
Submit documentation feedback | IMPORTANT NOTICE | Trademarks | Privacy policy | Cookie policy | Terms of use | Terms of sale