TPS22918-Q1 5.5V、2A、导通电阻为 52mΩ 的负载开关
- ZHCSF76B July 2016 – December 2019 TPS22918-Q1
  
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TPS22918-Q1 5.5V、2A、导通电阻为 52mΩ 的负载开关

本资源的原文使用英文撰写。为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

符合 AEC-Q100 标准
集成式单通道负载开关
符合汽车类应用的 16 通道 AFE：
- 器件温度等级 2：–40°C 至 +105°C 的环境工作温度范围
提供功能安全
- 提供文档以帮助创建功能安全系统设计
输入电压范围：1V 至 5.5V
低导通电阻 (R_ON)
- R_ON = 52mΩ（V_IN = 5V 时的典型值）
- R_ON = 53mΩ（V_IN = 3.3V 时的典型值）
2A 最大持续开关电流
低静态电流
- 8.3µA（V_IN = 3.3V 时的典型值）
低控制输入阈值支持使用 1V 或更高的 GPIO
可配置快速输出放电 (QOD)
通过 CT 引脚可配置上升时间
小型 SOT23-6 封装 (DBV)
- 2.9mm × 2.8mm，间距 0.95mm，
  高 1.45mm（带引线）
ESD 性能测试符合 AEC Q100 标准
- ±2kV 人体模型 (HBM) 和 ±750V 带电器件模型 (CDM)

2 应用

汽车电子产品
信息娱乐系统
仪表组
ADAS（高级驾驶辅助系统）

3 说明

TPS22918-Q1 是一款单通道负载开关，可对上升时间和快速输出放电进行配置。此器件包括一个 N 沟道金属氧化物半导体场效应晶体管 (MOSFET)，可在 1V 至 5.5V 的输入电压范围内运行并可支持
2A 的最大持续电流。此开关由一个开关输入控制，能够直接连接低电压控制信号。

该器件的可配置上升时间可降低大容量负载电容所产生的浪涌电流，从而降低或消除电源压降。TPS22918-Q1 具有一个可配置的快速输出放电 (QOD) 引脚，用于控制器件的下降时间，以便针对掉电或排序进行灵活设计。

TPS22918-Q1 采用小型、带引线的 SOT-23 封装 (DBV)，方便对焊接点进行外观检查。该器件在自然通风环境下的额定运行温度范围为 –40°C 至 +105°C。

器件信息⁽¹⁾

器件型号	封装	封装尺寸（标称值）
TPS22918-Q1	SOT-23 (6)	2.90mm × 1.60mm

如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。

Device Images

简化原理图

导通电阻与输入电压间的关系
典型值

I_OUT = -200mA

4 修订历史记录

Changes from A Revision (July 2016) to B Revision

向特性部分添加了提供功能安全的链接Go

Changes from * Revision (July 2016) to A Revision

已将器件状态由“产品预览”更改为“量产数据”Go

5 Pin Configuration and Functions

DBV Package

6-Pin SOT-23

Top View

Pin Functions

PIN		TYPE	DESCRIPTION
NO.	NAME	TYPE	DESCRIPTION
1	VIN	I	Switch input. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed Descriptionsection for more information
2	GND	—	Device ground
3	ON	I	Active high switch control input. Do not leave floating
4	CT	O	Switch slew rate control. Can be left floating. See the Feature Description section for more information
5	QOD	O	Quick Output Discharge pin. This functionality can be enabled in one of three ways Placing an external resistor between VOUT and QOD Tying QOD directly to VOUT and using the internal resistor value (R_PD) Disabling QOD by leaving pin disconnected See the Quick Output Discharge (QOD) section for more information
6	VOUT	O	Switch output

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted) ⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
V_IN	Input voltage	–0.3	6	V
V_OUT	Output voltage	–0.3	6	V
V_ON	ON voltage	–0.3	6	V
I_MAX	Maximum continuous switch current, T_A = 70°C ⁽³⁾		2	A
I_MAX	Maximum continuous switch current, T_A = 85°C ⁽³⁾		1.5	A
I_PLS	Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle		2.5	A
T_J	Maximum junction temperature		150	°C
T_stg	Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

(3) Assumes 12-K power-on hours at 100% duty cycle. This information is provided solely for your convenience and does not extend or modify the warranty provided under TI's standard terms and conditions for TI's semiconductor products.

6.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾		±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per AEC Q100-011		±750	V

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)

			MIN	MAX	UNIT
V_IN	Input voltage		1	5.5	V
V_ON	ON voltage		0	5.5	V
V_OUT	Output voltage			V_IN	V
V_{IH, ON}	High-level input voltage, ON	V_IN = 1 V to 5.5 V	1	5.5	V
V_{IL, ON}	Low-level input voltage, ON	V_IN = 1 V to 5.5 V	0	0.5	V
T_A	Operating free-air temperature ⁽¹⁾		–40	105	°C
C_IN	Input Capacitor		1 ⁽²⁾		µF

(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature [T_A(max)] is dependent on the maximum operating junction temperature [T_J(MAX)], the maximum power dissipation of the device in the application [P_D(MAX)], and the junction-to-ambient thermal resistance of the part-package in the application (θ_JA), as given by the following equation: T_A(MAX) = T_J(MAX) – (θ_JA × P_D(MAX)).

(2) See the Application and Implementation section.

6.4 Thermal Information

THERMAL METRIC ⁽¹⁾		TPS22918-Q1	UNIT
		DBV (SOT-23)
		6 PINS
R_θJA	Junction-to-ambient thermal resistance	183.2	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	151.6	°C/W
R_θJB	Junction-to-board thermal resistance	34.1	°C/W
ψ_JT	Junction-to-top characterization parameter	37.2	°C/W
ψ_JB	Junction-to-board characterization parameter	33.6	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise noted, the specification in the following table applies over the following operating ambient temperature
–40°C ≤ T_A ≤ +105°C (full). Typical values are for T_A = 25°C.

PARAMETER		TEST CONDITIONS		T_A	TYP	MAX	UNIT
I_{Q, VIN}	Quiescent current	V_ON = 5 V, I_OUT = 0 A	V_IN = 5.5 V	–40°C to +105°C	9.2	16	µA
			V_IN = 5 V		8.7	16
			V_IN = 3.3 V		8.3	15
			V_IN = 1.8 V		10.2	17
			V_IN = 1.2 V		9.3	16
			V_IN = 1 V		8.9	15
I_{SD, VIN}	Shutdown current	V_ON = 0 V, V_OUT = 0 V	V_IN = 5.5 V	–40°C to +105°C	0.5	5	µA
			V_IN = 5 V	–40°C to +105°C	0.5	4.5
			V_IN = 3.3 V	–40°C to +105°C	0.5	3.5
			V_IN = 1.8 V	–40°C to +105°C	0.5	2.5
			V_IN = 1.2 V	–40°C to +105°C	0.4	2
			V_IN = 1 V	–40°C to +105°C	0.4	2
I_ON	ON pin input leakage current	V_IN = 5.5 V, I_OUT = 0 A		–40°C to +105°C		0.1	µA
R_ON	On-Resistance	V_IN = 5.5 V, I_OUT = –200 mA		25°C	51	59	mΩ
		V_IN = 5.5 V, I_OUT = –200 mA		–40°C to +105°C		78
		V_IN = 5 V, I_OUT = –200 mA		25°C	52	59
		V_IN = 5 V, I_OUT = –200 mA		–40°C to +105°C		79
		V_IN= 4.2 V, I_OUT = –200 mA		25°C	52	59
		V_IN= 4.2 V, I_OUT = –200 mA		–40°C to +105°C		79
		V_IN = 3.3 V, I_OUT = –200 mA		25°C	53	59
		V_IN = 3.3 V, I_OUT = –200 mA		–40°C to +105°C		80
		V_IN= 2.5 V, I_OUT = –200 mA		25°C	53	61
		V_IN= 2.5 V, I_OUT = –200 mA		–40°C to +105°C		80
		V_IN = 1.8 V, I_OUT = –200 mA		25°C	55	65
		V_IN = 1.8 V, I_OUT = –200 mA		–40°C to +105°C		88
		V_IN = 1.2 V, I_OUT = –200 mA		25°C	64	77
		V_IN = 1.2 V, I_OUT = –200 mA		–40°C to +105°C		104
		V_IN = 1 V, I_OUT = –200 mA		25°C	71	85
		V_IN = 1 V, I_OUT = –200 mA		–40°C to +105°C		116
V_HYS	ON pin hysteresis	V_IN = 1 V to 5.5 V		–40°C to +105°C	107		mV
R_PD	Output pull down resistance	V_IN = 5 V, V_ON = 0 V		25°C	24		Ω
		V_IN = 5 V, V_ON = 0 V		–40°C to +105°C		30
		V_IN = 3.3 V, V_ON = 0 V		25°C	25
		V_IN = 3.3 V, V_ON = 0 V		–40°C to +105°C		35
		V_IN = 1.8 V, V_ON = 0 V		25°C	45
		V_IN = 1.8 V, V_ON = 0 V		–40°C to +105°C		60

6.6 Switching Characteristics

See timing test circuit in Figure 21 (unless otherwise noted) for references to external components used for the test condition in the switching characteristics table. Switching characteristics shown below are only valid for the power-up sequence where VIN is already in steady state condition before the ON pin is asserted high. Test Conditions: V_ON = 5 V, T_A = 25°C.

PARAMETER		TEST CONDITION	TYP	UNIT
V_IN = 5 V
t_ON	Turnon time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	1950	µs
t_OFF	Turnoff time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_R	V_OUT rise time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2540	µs
t_F	V_OUT fall time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_D	Delay time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	690	µs
V_IN = 3.3 V
t_ON	Turnon time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	1430	µs
t_OFF	Turnoff time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_R	V_OUT rise time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	1680	µs
t_F	V_OUT fall time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_D	Delay time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	590	µs
V_IN = 1.8 V
t_ON	Turnon time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	965	µs
t_OFF	Turnoff time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_R	V_OUT rise time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	960	µs
t_F	V_OUT fall time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_D	Delay time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	480	µs
V_IN = 1 V
t_ON	Turnon time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	725	µs
t_OFF	Turnoff time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	3	µs
t_R	V_OUT rise time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	560	µs
t_F	V_OUT fall time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	2	µs
t_D	Delay time	R_L = 10 Ω, C_IN = 1 µF, C_OUT = 0.1 µF, CT = 1000 pF	430	µs

6.7 Typical DC Characteristics

V_ON = 5 V

I_OUT = 0 A

Figure 1. Quiescent Current vs Input Voltage

V_ON = 5 V

I_OUT = –200 mA

Figure 3. On-Resistance vs Temperature

V_ON = 5 V

T_A = 25°C

Figure 5. On-Resistance vs Output Current

V_IN = V_OUT

V_ON = 0 V

Figure 7. Output Pull-Down Resistance vs Input Voltage

V_ON = 0 V

I_OUT = 0 A

Figure 2. Shutdown Current vs Input Voltage

V_ON = 5 V

I_OUT = –200 mA

Figure 4. On-Resistance vs Input Voltage

I_OUT = 0 A

Figure 6. Hysteresis Voltage vs Input Voltage

6.8 Typical AC Characteristics

C_IN = 1 µF	R_L = 10 Ω	C_L = 0.1 µF
CT = 1000 pF

Figure 8. Rise Time vs Input Voltage

C_IN = 1 µF	R_L = 10 Ω	C_L = 0.1 µF	QOD = Open

Figure 10. Fall Time vs Input Voltage

C_IN = 1 µF	R_L = 10 Ω	C_L = 0.1 µF	CT =1000 pF

Figure 12. Turnon Time vs Input Voltage

TPS22918-Q1 918_Off Time_VIN=5V_CT=1000pF.png

V_IN = 5 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	QOD = Open

Figure 14. Fall Time (t_F) at V_IN = 5 V

TPS22918-Q1 918_Off Time_VIN=3.3V_CT=1000pF.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	QOD = Open

Figure 16. Fall Time (t_F) at V_IN = 3.3 V

TPS22918-Q1 918_Off Time_VIN=1.8V_CT=1000pF.png

V_IN = 1.8 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	QOD = Open

Figure 18. Fall Time (t_F) at V_IN = 1.8 V

TPS22918-Q1 918_Off Time_VIN=1V_CT=1000pF.png

V_IN = 1.0 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	QOD = Open

Figure 20. Fall Time (t_F) at V_IN = 1 V

C_IN = 1 µF	R_L = 10 Ω	C_L = 0.1 µF

Figure 9. Delay Time vs Input Voltage

C_IN = 1 µF	R_L = 10 Ω	C_L = 0.1 µF

Figure 11. Turnoff Time vs Input Voltage

TPS22918-Q1 918_On Time_VIN=5V_CT=1000pF.png

V_IN = 5 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	CT = 1000 pF

Figure 13. Rise Time (t_R) at V_IN = 5 V

TPS22918-Q1 918_On Time_VIN=3.3V_CT=1000pF.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	CT = 1000 pF

Figure 15. Rise Time (t_R) at V_IN = 3.3 V

TPS22918-Q1 918_On Time_VIN=1.8V_CT=1000pF.png

V_IN = 1.8 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	CT = 1000 pF

Figure 17. Rise Time (t_R) at V_IN = 1.8 V

TPS22918-Q1 918_On Time_VIN=1V_CT=1000pF.png

V_IN = 1.0 V	C_IN = 1 µF	C_L = 0.1 µF
R_L = 10 Ω	CT = 1000 pF

Figure 19. Rise Time (t_R) at V_IN = 1 V

7 Parameter Measurement Information

1. Rise and fall times of the control signal is 100 ns.

2. Turnoff times and fall times are dependent on the time constant at the load. For TPS22918-Q1, the internal pull-down resistance R_PD is enabled when the switch is disabled. The time constant is (R_QOD || R_L) × C_L where R_QOD equals R_PD + R_EXT.

Figure 21. Test Circuit

Figure 22. Timing Waveforms

8 Detailed Description

8.1 Overview

The TPS22918-Q1 is a 5.5-V, 2-A load switch in a 6-pin SOT-23 package. To reduce voltage drop for low voltage and high current rails, the device implements a low resistance N-channel MOSFET which reduces the drop out voltage through the device.

The device has a configurable slew rate which helps reduce or eliminate power supply droop because of large inrush currents. Furthermore, the device features a QOD pin, which allows to configure the discharge rate of VOUT once the switch is disabled. During shutdown, the device has very low leakage currents, thereby reducing unnecessary leakages for downstream modules during standby. Integrated control logic, driver, charge pump, and output discharge FET eliminates the need for any external components, which reduces solution size and bill of materials (BOM) count.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 On and Off Control

The ON pin controls the state of the switch. ON is active high and has a low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard GPIO logic threshold. It can be used with any microcontroller with 1 V or higher GPIO voltage. This pin cannot be left floating and must be driven either high or low for proper functionality.

8.3.2 Quick Output Discharge (QOD)

The TPS22918-Q1 includes a QOD feature. The QOD pin can be configured in one of three valid ways:

QOD pin shorted to VOUT pin. Using this method, the discharge rate after the switch becomes disabled is controlled with the value of the internal resistance R_PD. The value of this resistance is listed in the Electrical Characteristics table.
QOD pin connected to VOUT pin using an external resistor R_EXT. After the switch becomes disabled, the discharge rate is controlled by the value of the total resistance of the QOD. To adjust the total QOD resistance, Equation 1 can be used.

Equation 1. R_QOD = R_PD + R_EXT

where

R_QOD is the total output discharge resistance
R_PD is the internal pulldown resistance
R_EXT is the external resistance placed between the VOUT and QOD pin.

QOD pin is unused and left floating. Using this method, there is no quick output discharge functionality, and the output remains floating after the switch is disabled.

The fall times of the device depend on many factors including the total resistance of the QOD, V_IN, and the output capacitance. When QOD is shorted to VOUT, the fall time changes over V_IN as the internal R_PD varies over V_IN. To calculate the approximate fall time of V_OUT for a given R_QOD, use Equation 2 and Table 1.

Equation 2. V_CAP = V_IN × e^-t/τ

where

V_CAP is the voltage across the capacitor (V)
t is the time since power supply removal (s)
τ is the time constant equal to R_QOD × C_L

The fall times' dependency on V_IN becomes minimal as the QOD value increases with additional external resistance. See Table 1 for QOD fall times.

Table 1. QOD Fall Times

V_IN (V)	FALL TIME (μs) 90% - 10%, C_IN = 1 μF, I_OUT = 0 A , V_ON = 0 V⁽¹⁾
	T_A = 25°C			T_A = 85°C
	C_L = 1 μF	C_L = 10 μF	C_L = 100 μF	C_L = 1 μF	C_L = 10 μF	C_L = 100 μF
5.5	42	190	1880	40	210	2150
5	43	200	1905	45	220	2200
3.3	47	230	2150	50	260	2515
2.5	58	300	2790	60	345	3290
1.8	75	430	4165	80	490	4950
1.2	135	955	9910	135	1035	10980
1	230	1830	19625	210	1800	19270

(1) Typical values with QOD shorted to VOUT

8.3.2.1 QOD when System Power is Removed

The adjustable QOD can be used to control the power down sequencing of a system even when the system power supply is removed. When the power is removed, the input capacitor discharges at V_IN. Past a certain V_IN level, the strength of the R_PD is reduced. If there is still remaining charge on the output capacitor, this results in longer fall times. For further information regarding this condition, see the Shutdown Sequencing During Unexpected System Power Loss section.

8.3.2.2 Internal QOD Considerations

Special considerations must be taken when using the internal R_PD by shorting the QOD pin to the VOUT pin. The internal R_PD is a pulldown resistance designed to quickly discharge a load after the switch has been disabled. Care must be used to ensure that excessive current does not flow through R_PD during discharge so that the maximum T_J of 150°C is not exceeded. When using only the internal R_PD to discharge a load, the total capacitive load must not exceed 200 µF. Otherwise, an external resistor, R_EXT, must be used to ensure the amount of current flowing through R_PD is properly limited and the maximum T_J is not exceeded. To ensure the device is not damaged, the remaining charge from C_L must decay naturally through the internal QOD resistance and must not be driven.

8.3.3 Adjustable Rise Time (CT)

A capacitor to GND on the CT pin sets the slew rate for each channel. The capacitor to GND on the CT pin must be rated for 25 V and above. An approximate formula for the relationship between CT and slew rate is shown in Equation 3.

Equation 3. SR = 0.55 × CT + 30

where

SR is the slew rate (in µs/V)
CT is the capacitance value on the CT pin (in pF)
The units for the constant 30 are µs/V. The units for the constant 0.55 are µs/(V × pF)

Equation 3 accounts for 10% to 90% measurement on V_OUT and does not apply for CT less than 100 pF. Use Table 2 to determine rise times for when CT is greater or equal to 100 pF.

Rise time can be calculated by multiplying the input voltage by the slew rate. Table 2 contains rise time values measured on a typical device.

Table 2. Rise Time Table

CTx (pF)	RISE TIME (µs) 10% - 90%, C_L = 0.1 µF, C_IN = 1 µF, R_L = 10 Ω Typical values at 25°C with a 25-V X7R 10% ceramic capacitor on CT
CTx (pF)	VIN = 5 V	VIN = 3.3 V	VIN = 2.5 V	VIN = 1.8 V	VIN = 1.5 V	VIN = 1.2V	VIN = 1.0 V
0	135	95	75	60	50	45	40
220	650	455	350	260	220	185	160
470	1260	850	655	480	415	340	300
1000	2540	1680	1300	960	810	660	560
2200	5435	3580	2760	2020	1715	1390	1220
4700	12050	7980	6135	4485	3790	3120	2735
10000	26550	17505	13460	9790	8320	6815	5950

As the voltage across the capacitor approaches the capacitor rated voltage, the effective capacitance reduces. Depending on the dielectric material used, the voltage coefficient changes. See Table 3 for the recommended minimum voltage rating for the CT capacitor.

Table 3. Recommended CT Capacitor Voltage Rating

V_IN (V)	RECOMMENDED CT CAPACITOR VOLTAGE RATING (V)⁽¹⁾
1 V to 1.2 V	10
1.2 V to 4 V	16
4 V to 5.5 V	20

(1) If using V_IN = 1.2 V or 4 V, it is recommended to use the higher voltage rating.

8.4 Device Functional Modes

Table 4 describes the connection of the VOUT pin depending on the state of the ON pin.

Table 4. VOUT Connection

ON	QOD Configuration	TPS22918-Q1
L	QOD pin connected to VOUT with R_EXT	GND (via R_EXT + R_PD)
L	QOD pin tied to VOUT directly	GND (via R_PD)
L	QOD pin left open	Open
H	Any valid QOD configuration	VIN

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

This section highlights some of the design considerations when implementing this device in various applications. A PSPICE model for this device is also available in the product page of this device on www.ti.com (See the 器件支持 section for more information).

9.2 Typical Application

This typical application demonstrates how the TPS22918-Q1 can be used to power downstream modules.

Figure 23. Typical Application Schematic

9.2.1 Design Requirements

For this design example, use the input parameters listed in Table 5.

Table 5. Design Parameter

DESIGN PARAMETER	EXAMPLE VALUE
V_IN	5 V
Load current	2 A
C_L	22 uF
t_F	4 ms
Maximum acceptable inrush current	400 mA

9.2.2 Detailed Design Procedure

9.2.2.1 Input Capacitor (C_IN)

To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a discharged load capacitor or short-circuit, a capacitor must be placed between VIN and GND. A 1 µF ceramic capacitor, C_IN, placed close to the pins, is usually sufficient. Higher values of C_IN can be used to further reduce the voltage drop during high-current application. When switching heavy loads, it is recommended to have an input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.

9.2.2.2 Output Capacitor (C_L) (Optional)

Becuase of the integrated body diode in the MOSFET, a C_IN greater than C_L is highly recommended. A C_L greater than C_IN can cause V_OUT to exceed V_IN when the system supply is removed. This could result in current flow through the body diode from VOUT to VIN. A C_IN to C_L ratio of 10 to 1 is recommended for minimizing V_IN dip caused by inrush currents during startup.

9.2.2.3 Shutdown Sequencing During Unexpected System Power Loss

Microcontrollers and processors often have a specific shutdown sequence in which power must be removed. Using the adjustable Quick Output Discharge function of the TPS22918-Q1, adding a load switch to each power rail can be used to manage the power down sequencing in the event of an unexpected system power loss (battery removal). To determine the QOD values for each load switch, first confirm the power down order of the device this is wished to power sequence. Be sure to check if there are voltage or timing margins that must be maintained during power down. Next, refer to Table 1 in the Quick Output Discharge (QOD) section to determine appropriate C_OUT and R_QOD values for each power rail's load switch so that the load switches' fall times correspond to the order in which they need to be powered down. In the above example, make sure this power rail's fall time to be 4 ms. Using Equation 2, to determine the appropriate R_QOD to achieve our desired fall time.
Because fall times are measured from 90% of V_OUT to 10% of V_OUT, Equation 2 becomes Equation 4.

Equation 4. .5 V = 4.5 V × e^{-(4 ms) / (R × (22 µF))}

Equation 5. R_QOD = 83.333 Ω

Refer to Figure 7, R_PD at V_IN = 5 V is approximately 25 Ω. Using Equation 1, the required external QOD resistance can be calculated as shown in Equation 6.

Equation 6. 83.333 Ω = 25 Ω + R_EXT

Equation 7. R_EXT = 58.333 Ω

Figure 24 through Figure 29 are scope shots demonstrating an example of the QOD functionality when power is removed from the device (both ON and VIN are disconnected simultaneously). The input voltage is decaying in all scope shots below.

Initial V_IN = 3.3 V
QOD = Open, 500 Ω, or shorted to VOUT
C_L = 1 μF, 10 μF
V_OUT is left floating

NOTE: V_IN may appear constant in some figures. This is because the time scale of the scope shot is too small to show the decay of C_IN.

TPS22918-Q1 tFall with QOD_CIN=COUT=1uF_VIN=3.3V_QOD=Open.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 1 µF
	QOD = Open

Figure 24. Fall Time (t_F) at V_IN = 3.3 V

TPS22918-Q1 tFall with QOD_CIN=COUT=1uF_VIN=3.3V_QOD=VOUT.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 1 µF
	QOD = V_OUT

Figure 26. Fall Time (t_F) at V_IN = 3.3 V

TPS22918-Q1 tFall with QOD_CIN=COUT=10uF_VIN=3.3V_QOD=500ohm_zommed out.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 10 µF
	QOD = 500 Ω

Figure 28. Fall Time (t_F) at V_IN = 3.3 V

TPS22918-Q1 tFall with QOD_CIN=COUT=1uF_VIN=3.3V_QOD=500ohm.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 1 µF
	QOD = 500 Ω

Figure 25. Fall Time (t_F) at V_IN = 3.3 V

TPS22918-Q1 tFall with QOD_CIN=COUT=10uF_VIN=3.3V_QOD=Open.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 10 µF
	QOD = Open

Figure 27. Fall Time (t_F) at V_IN = 3.3 V

TPS22918-Q1 tFall with QOD_CIN=COUT=10uF_VIN=3.3V_QOD=VOUT_zoomed out.png

V_IN = 3.3 V	C_IN = 1 µF	C_L = 10 µF
	QOD = VOUT

Figure 29. Fall Time (t_F) at V_IN = 3.3 V

9.2.2.4 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the R_ON of the device and the load current. The R_ON of the device depends upon the VIN conditions of the device. Refer to the R_ON specification of the device in the Electrical Characteristics table. When the R_ON of the device is determined based upon the VIN conditions, use Equation 8 to calculate the VIN to VOUT voltage drop.

Equation 8. ∆V is the I_LOAD × R_ON

where

ΔV is the voltage drop from VIN to VOUT
I_LOAD is the load current
R_ON is the On-resistance of the device for a specific V_IN