As the load current decreases, the converter enters power save mode operation. During power save mode, the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current while maintaining high efficiency. The power save mode is based on a fixed on-time architecture following Equation 3. When operating at 1.4 MHz, the on-time is twice as long as the on-time for 2.8-MHz operation, resulting in larger output voltage ripple, as shown in Figure 7-11 and Figure 7-12, and slightly higher output voltage at no load, as shown in Figure 7-8 and Figure 7-9. To have the same output voltage ripple at 1.4 MHz during PFM mode, either the output capacitor or the inductor value must be increased. As an example, operating at 2.8 MHz using
0.47-µH inductor gives the same output voltage ripple as operating with 1.4 MHz using 1-µH inductor.

Equation 3.

In power save mode the output voltage rises slightly above the nominal output voltage in PWM mode, as shown in Figure 7-8 and Figure 7-9. This effect is reduced by increasing the output capacitance or the inductor value. This effect is also reduced by programming the output voltage of the TPS62090Q lower than the target value. As an example, if the target output voltage is 3.3 V, then the TPS62090Q is programmed to 3.3 V – 0.8%. As a result the output voltage accuracy is now –2.2% to +2.2% instead of –1.4% to 3%. The output voltage accuracy in PFM operation is reflected in the Section 5.5 table and given for a 22-µF output capacitance.