ZHCS146C December 2011 – April 2020 ADS1291 , ADS1292 , ADS1292R
PRODUCTION DATA.
Table 16 describes the various ADS1291, ADS1292, and ADS1292R registers.
ADDRESS | REGISTER | RESET VALUE (Hex) | BIT 7 | BIT 6 | BIT 5 | BIT 4 | BIT 3 | BIT 2 | BIT 1 | BIT 0 |
---|---|---|---|---|---|---|---|---|---|---|
Device Settings (Read-Only Registers) | ||||||||||
00h | ID | XX | REV_ID7 | REV_ID6 | REV_ID5 | 1 | 0 | 0 | REV_ID1 | REV_ID0 |
Global Settings Across Channels | ||||||||||
01h | CONFIG1 | 02 | SINGLE_
SHOT |
0 | 0 | 0 | 0 | DR2 | DR1 | DR0 |
02h | CONFIG2 | 80 | 1 | PDB_LOFF_
COMP |
PDB_REFBUF | VREF_4V | CLK_EN | 0 | INT_TEST | TEST_FREQ |
03h | LOFF | 10 | COMP_TH2 | COMP_TH1 | COMP_TH0 | 1 | ILEAD_OFF1 | ILEAD_OFF0 | 0 | FLEAD_OFF |
Channel-Specific Settings | ||||||||||
04h | CH1SET | 00 | PD1 | GAIN1_2 | GAIN1_1 | GAIN1_0 | MUX1_3 | MUX1_2 | MUX1_1 | MUX1_0 |
05h | CH2SET | 00 | PD2 | GAIN2_2 | GAIN2_1 | GAIN2_0 | MUX2_3 | MUX2_2 | MUX2_1 | MUX2_0 |
06h | RLD_SENS | 00 | CHOP1 | CHOP0 | PDB_RLD | RLD_LOFF_
SENS |
RLD2N | RLD2P | RLD1N | RLD1P |
07h | LOFF_SENS | 00 | 0 | 0 | FLIP2 | FLIP1 | LOFF2N | LOFF2P | LOFF1N | LOFF1P |
08h | LOFF_STAT | 00 | 0 | CLK_DIV | 0 | RLD_STAT | IN2N_OFF | IN2P_OFF | IN1N_OFF | IN1P_OFF |
GPIO and Other Registers | ||||||||||
09h | RESP1 | 00 | RESP_
DEMOD_EN1 |
RESP_MOD_
EN |
RESP_PH3 | RESP_PH2 | RESP_PH1 | RESP_PH0 | 1 | RESP_CTRL |
0Ah | RESP2 | 02 | CALIB_ON | 0 | 0 | 0 | 0 | RESP_FREQ | RLDREF_INT | 1 |
0Bh | GPIO | 0C | 0 | 0 | 0 | 0 | GPIOC2 | GPIOC1 | GPIOD2 | GPIOD1 |