SWRZ159B April   2024  – December 2025 IWRL6432AOP

 

  1.   1
  2.   ABSTRACT
  3. 1Introduction
  4. 2Device Nomenclature
  5. 3Device Markings
  6. 4Usage Notes
    1. 4.1 Power up sequence in power optimized topology
    2. 4.2 Meeting data sheet spec for 1.2V Digital LDO output path in BOM optimized topology
  7. 5Advisory to Silicon Variant / Revision Map
  8. 6Known Design Exceptions to Functional Specifications
    1. 6.1  ANA #51
    2. 6.2  ANA#54
    3. 6.3  ANA #57
    4. 6.4  DIG #1
    5. 6.5  DIG #3
    6. 6.6  DIG #4
    7. 6.7  DIG #5
    8. 6.8  DIG #6
    9. 6.9  DIG #8
    10. 6.10 DIG #9
    11. 6.11 DIG #10
    12. 6.12 DIG #14
    13. 6.13 DIG #15
    14. 6.14 DIG #16
  9. 7Trademarks
  10.   Revision History

6.8 DIG #6

CRC: CRC 8-bit data width and CRC8-SAE-J1850 and CRC8-H2F possible use in CAN module is not supported

Revisions Affected

IWRL6432AOPES2.0

Details

  1. 8-bit data width is not supported. Minimum data width supported is 16-bit.
  2. CRC types CRC8-SAE-J1850 and CRC8-H2F are not supported.

Workaround

  1. 16/32/64-bit data widths are supported.
  2. TI recommends to not use the above mentioned unsupported polynomials.