George Lakkas

Given their high performance and integration capabilities, several data center and industrial applications use Xilinx® Ultrascale™ and Ultrascale+ field-programmable gate arrays (FPGAs), including enterprise switches, server FPGA accelerator cards, test and measurement, and space and defense.

Knowing the Xilinx FPGA power specifications for a particular Ultrascale+ FPGA family – Zynq multiprocessor system-on-chip (MPSoC), Virtex, Kintex – requires downloading and using the Xilinx Power Estimator (XPE), as shown in Figure 1.

Once on the XPE site, you’ll select the settings that correspond to your device family (Zynq Ultrascale+, for example), device part number (such as the XCZU9EG), speed grade, temperature grade and environment (including board size and layers). You’ll then complete the power profile by selecting the clock, logic, input/output (I/O), RAM, digital signal processor (DSP) and transceiver options.

TI has done the pre-work and created a spreadsheet with all Xilinx Ultrascale+ Family variants, their corresponding part numbers, rail names, loading options (choices of clock/logic/I/O, RAM, DSP and transceiver) and voltage and current specifications, as shown in Figure 2.

These detailed power specifications for every Xilinx Ultrascale+ FPGA family, device number and loading type (low/medium/high) will soon be represented in TI’s Xilinx FPGA power selection portal , as shown in Figure 3. Xilinx Ultrascale FPGAs and TI’s power solutions are already represented in this portal.

As you can see in Figure 3, depending on the loading (low, medium, high), the power solution may vary to optimize the performance/efficiency/density/cost of the specific design.Based on TI’s summary of the XPE power requirements of Ultrascale+ FPGA families and the solution recommendation on TI’s Xilinx power solution selection portal, you may be able to get a head start on your board design with a corresponding reference design in the TI Designs reference designs library. For example, for the Virtex Ultrascale XCVU065 medium-loading VCCINT rail 120A requirement, TI’s FPGA power solution selection portal recommends the TPS53647 DCAP+™ control mode buck controller with PMBus.Figure 4 shows a 1V/120A four-phase buck from the High Efficiency, Power Density 1V/120A/30A/30A (4+1+1) with PMBus Reference Design   that you can use for this requirement.

You can find and download the various Xilinx FPGA designs on the TI reference designs selection page . Type Ultrascale or Ultrascale+ in the Keyword box, get the results, and then filter for your particular FPGA or type of solution (power-management integrated circuit [PMIC], discrete buck converter/controller, multiphase buck or module), as shown in Figure 6.

You can also click the Search power designs by parameters tab and check the FPGA box. This will give you all of the available FPGA reference designs in tabular form, as shown in Figure 7, which you can filter for the Xilinx Ultrascale/Ultrascale+ reference design that you need.

If you are designing with Xilinx Ultrascale/Ultrascale+ FPGAs and don’t know where to start, TI has made it easy to select the power solution, find the optimal reference design from the TI Designs reference design library , and get ahead of the competition with our easy-to-use power selection and design tools.