The CMPSS module is used for overcurrent monitoring for the phase currents. A threshold is set using the CMPSS DAC, and if the output of the current sense amplifier exceeds that threshold then the CMPSS output will trip.

If using a custom motor driver board, or migrating the code to a C2000 MCU or a TI motor driver EVM that is not supported with the current Universal Motor Control Lab, then the connections between the ADC pins and the CMPSS modules will need to be properly modified in the hal.h file based on the motor driver and C2000 MCU connections. For more details on the internal connections of the CMPSS module, see the Analog Pins and Internal Connections table in the TMS320F28002x Real-Time Microcontrollers Technical Reference Manual (Rev. A).

The HAL module configures the CMPSS modules according to the motor driver board that is used. For example, the diagram of the connections between the LAUNCHXL-F280025C and the BOOSTXL-DRV8323RS are shown in Figure 3-33. The configuration of the CMPSS modules are described in the following steps (Board-specific or MCU-specific changes are indicated in bold).

1. The below code shows the defines of the base addresses of the CMPSS modules for the 3 phase currents. The code is located in the hal.h file.

   #define MTR1_CMPSS_U_BASE       CMPSS1_BASE
   #define MTR1_CMPSS_V_BASE       CMPSS3_BASE
   #define MTR1_CMPSS_W_BASE       CMPSS1_BASE

2. The below code shows the defines that are used to assign the desired ADC inputs to the correct CMPSS module. This code is found in the hal.h file. Each CMPSS comparator has a high and low comparator, so the signals must be muxed appropriately to the desired input of the desired comparator. For more information on these connections, please refer to the Analog Pins and internal connections table in the technical reference manual of the microcontroller that is being used. Note: for the LAUNCHXL F280025C, the available CMPSS modules for the motor driver current sensing pins are CMPSS3 and CMPSS1, so the phase U current and phase W current both need to share CMPSS1. This results in the limitation that phase U current only trips the CMPSS with a positive overcurrent, and phase W current only trips the CMPSS with a negative overcurrent. Since phase V has a dedicated CMPSS available, overcurrent on this phase will be detected for both postitive and negative currents. If modifying the code to support a C2000 MCU device that has separate CMPSS modules for each phase current inputs (such as in the case of the F280049C Launchpad), then the code can be configured to trip with both high and low overcurrents on each of the phases by muxing the same phase current ADC input to both the high and low inputs of the corresponding CMPSS module.

   // CMPSS
   // For single phase current sensing, DRV8323RH and RS only
   #define MTR1_IDC_CMPHP_SEL      ASYSCTL_CMPHPMUX_SELECT_3    // CMPSS3-A14/C4*
   #define MTR1_IDC_CMPLP_SEL      ASYSCTL_CMPLPMUX_SELECT_3    // CMPSS3-A14/C4*
   
   #define MTR1_IDC_CMPHP_MUX      4                            // CMPSS3-A14/C4*
   #define MTR1_IDC_CMPLP_MUX      4                            // CMPSS3-A14/C4*
   
   // For three-phase current sensing
   #define MTR1_IU_CMPHP_SEL       ASYSCTL_CMPHPMUX_SELECT_1    // CMPSS1-A11
   #define MTR1_IU_CMPLP_SEL       ASYSCTL_CMPLPMUX_SELECT_1    // CMPSS1-A11, N/A
   
   #define MTR1_IV_CMPHP_SEL       ASYSCTL_CMPHPMUX_SELECT_3    // CMPSS3-C4
   #define MTR1_IV_CMPLP_SEL       ASYSCTL_CMPLPMUX_SELECT_3    // CMPSS3-C4
   
   #define MTR1_IW_CMPHP_SEL       ASYSCTL_CMPHPMUX_SELECT_1    // CMPSS1-C7, N/A
   #define MTR1_IW_CMPLP_SEL       ASYSCTL_CMPLPMUX_SELECT_1    // CMPSS1-C7
   
   #define MTR1_IU_CMPHP_MUX       1                            // CMPSS1-A11
   #define MTR1_IU_CMPLP_MUX       1                            // CMPSS1-A11
   
   #define MTR1_IV_CMPHP_MUX       4                            // CMPSS3-C4
   #define MTR1_IV_CMPLP_MUX       4                            // CMPSS3-C4
   
   #define MTR1_IW_CMPHP_MUX       3                            // CMPSS1-C7
   #define MTR1_IW_CMPLP_MUX       3                            // CMPSS1-C7

3. The below code shows the setup of the CMPSS modules which occurs in the HAL_setupCMPSSs() function that is located in the hal.c file. In this example, the CMPSS1_HP is linked to phase U current, and CMPSS1_LP is linked to phase W current, so the CMPSS1 is configured twice to simplify the code. The below code may not need to be modified when modifying the Universal Motor Control Lab, but it is important to ensure that the code in the previous step is properly configured so that the HAL_setupCMPSSs() function sets up the CMPSS modules correctly.

   void HAL_setupCMPSSs(HAL_MTR_Handle handle)
   {
       HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
   ... ...
       uint16_t cmpsaDACH = MTR1_CMPSS_DACH_VALUE;
       uint16_t cmpsaDACL = MTR1_CMPSS_DACL_VALUE;
   ... ...
       ASysCtl_selectCMPHPMux(MTR1_IU_CMPHP_SEL, MTR1_IU_CMPHP_MUX);
       ASysCtl_selectCMPLPMux(MTR1_IU_CMPLP_SEL, MTR1_IU_CMPLP_MUX);
   
       ASysCtl_selectCMPHPMux(MTR1_IV_CMPHP_SEL, MTR1_IV_CMPHP_MUX);
       ASysCtl_selectCMPLPMux(MTR1_IV_CMPLP_SEL, MTR1_IV_CMPLP_MUX);
   
       ASysCtl_selectCMPHPMux(MTR1_IW_CMPHP_SEL, MTR1_IW_CMPHP_MUX);
       ASysCtl_selectCMPLPMux(MTR1_IW_CMPLP_SEL, MTR1_IW_CMPLP_MUX);
   
       for(cnt=0; cnt<3; cnt++)
       {
           // Enable CMPSS and configure the negative input signal to come from the DAC
           CMPSS_enableModule(obj->cmpssHandle[cnt]);
   
           // NEG signal from DAC for COMP-H
           CMPSS_configHighComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
   
           // NEG signal from DAC for COMP-L
           CMPSS_configLowComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
   
           // Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
           // the asynchronous comparator output.
           // Dig filter output ==> CTRIPH, Dig filter output ==> CTRIPOUTH
           CMPSS_configOutputsHigh(obj->cmpssHandle[cnt],
                                   CMPSS_TRIP_FILTER |
                                   CMPSS_TRIPOUT_FILTER);
   
           // Dig filter output ==> CTRIPL, Dig filter output ==> CTRIPOUTL
           CMPSS_configOutputsLow(obj->cmpssHandle[cnt],
                                  CMPSS_TRIP_FILTER |
                                  CMPSS_TRIPOUT_FILTER |
                                  CMPSS_INV_INVERTED);
   
           // Configure digital filter. For this example, the maxiumum values will be
           // used for the clock prescale, sample window size, and threshold.
           CMPSS_configFilterHigh(obj->cmpssHandle[cnt], 32, 32, 30);
           CMPSS_initFilterHigh(obj->cmpssHandle[cnt]);
   
           // Initialize the filter logic and start filtering
           CMPSS_configFilterLow(obj->cmpssHandle[cnt], 32, 32, 30);
           CMPSS_initFilterLow(obj->cmpssHandle[cnt]);
   
           // Set up COMPHYSCTL register
           // COMP hysteresis set to 2x typical value
           CMPSS_setHysteresis(obj->cmpssHandle[cnt], 1);
   
           // Use VDDA as the reference for the DAC and set DAC value to midpoint for
           // arbitrary reference
           CMPSS_configDAC(obj->cmpssHandle[cnt],
                      CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK | CMPSS_DACSRC_SHDW);
   
           // Set DAC-H to allowed MAX +ve current
           CMPSS_setDACValueHigh(obj->cmpssHandle[cnt], cmpsaDACH);
   
           // Set DAC-L to allowed MAX -ve current
           CMPSS_setDACValueLow(obj->cmpssHandle[cnt], cmpsaDACL);
   
           // Clear any high comparator digital filter output latch
           CMPSS_clearFilterLatchHigh(obj->cmpssHandle[cnt]);
   
           // Clear any low comparator digital filter output latch
           CMPSS_clearFilterLatchLow(obj->cmpssHandle[cnt]);
       }
   ... ...
       return;
   }