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SPMU380 July 2026 TPS25730A

4.1 TPS25730A Registers

Table 4-1 lists the memory-mapped registers for the TPS25730A registers. All register offset addresses not listed in Table 4-1 should be considered as reserved locations and the register contents should not be modified.

Table 4-1 TPS25730A Registers

Offset	Acronym	Register Name	Section
8h	Command Register (CMD1) for I2Ct	Command Register (CMD1) for I2Ct	Section 4.1.1
9h	Data Register (DATA1) for CMD1	Data Register (DATA1) for CMD1	Section 4.1.2
1Ah	Status	Status	Section 4.1.3
26h	Power Path Status	Power Path Status	Section 4.1.4
30h	Received Source Capabilities	Received Source Capabilities	Section 4.1.5
33h	Transmit Sink Capabilities	Transmit Sink Capabilities	Section 4.1.6
34h	Active PDO Contract	Active PDO Contract	Section 4.1.7
35h	Active RDO Contract	Active RDO Contract	Section 4.1.8
37h	Autonegotiate Sink	Autonegotiate Sink	Section 4.1.9
40h	PD Status	PD Status	Section 4.1.10

Complex bit access types are encoded to fit into small table cells. Table 4-2 shows the codes that are used for access types in this section.

Table 4-2 TPS25730A Access Type Codes

Access Type	Code	Description
Read Type
R	R	Read
Write Type
W	W	Write
Reset or Default Value
-n		Value after reset or the default value

4.1.1 Command Register (CMD1) for I2Ct (Offset = 8h) [Reset = 00000000h]

Command Register (CMD1) for I2Ct is shown in Table 4-3.

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Command register. The PD Controller clears it on initialization and after completing a command.

Table 4-3 Command Register (CMD1) for I2Ct Field Descriptions

Bit	Field	Type	Reset	Description
31-0	Command	R/W	0h	Command register for the command interface. The PD Controller clears this register to 0x0 on initialization and after completing any recognized commands. Unrecognized commands are overwritten with !CMD.

4.1.2 Data Register (DATA1) for CMD1 (Offset = 9h) [Reset = 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000h]

Data Register (DATA1) for CMD1 is shown in Table 4-4.

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Data register (DATA1) for the command interface (CMD1).

Table 4-4 Data Register (DATA1) for CMD1 Field Descriptions

Bit	Field	Type	Reset	Description
511-0	Data	R/W	0h	Data register (DATA1) for the command interface (CMD1). The first byte of this register will contain the return code if applicable, and the remaining bytes will contain the command's output

4.1.3 Status Register (Offset = 1Ah) [Reset = 0000000000h]

Status is shown in Table 4-5.

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Status bit field for events.

Table 4-5 Status Register Field Descriptions

Bit	Field	Type	Reset	Description
39-26	RESERVED	R	0h
25-24	Acting as Legacy	R	0h	Indicates when PD Controller has gone into a mode where it is acting like a legacy (non PD) device. It can take approximately 10 seconds for the PD controller to determine that it is attached to a legacy source or sink. 0h = PD Controller is not in a legacy (non PD) mode 1h = PD Controller is acting like a legacy sink 3h = Acting as legacy sink due to dead-battery.
23-22	RESERVED	R	0h
21-20	VBUS Status	R	0h	Indicates the present state of VBUS. 0h = At vSafe0V (less than 0.8V) 1h = At vSafe5V (4.75V to 5.5V) 2h = Within expected limits 3h = Not within any of the other specified ranges
19-7	RESERVED	R	0h
6	Data Role	R	0h	PD controller data role. This is only valid once there is a connection. 0h = Upward-facing port (UFP)
5	Port Role	R	0h	Current state of PD Controller CCx terminations. This also indicates the PD Controller Power Role, once connected. This bit does not toggle during Unattached state transitions. 0h = PD Controller is in the Sink role
4	Plug Orientation	R	0h	Plug orientation indicator. Indicates port orientation when known (requires connection). 0h = Upside-up orientation (plug CC on CC1) 1h = Upside-down orientation (plug CC on CC2)
3-1	Connection State	R	0h	Details of a connected plug. 0h = No connection 1h = Port is disabled 2h = Corrosion Mitigaion (Ra/Ra) 3h = Debug connection (Rd/Rd) 4h = No connection Ra detected (Ra but no Rd) 5h = Debug connection (Rp/Rp) 6h = Connection present no Ra detected 7h = Connection present Ra detected
0	Plug Present	R	0h	Status of the plug 0h = No plug is connected 1h = A plug is connected

4.1.4 Power Path Status Register (Offset = 26h) [Reset = 0000000000h]

Power Path Status is shown in Table 4-6.

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Power Path Status. This is a hardware dependent register.

Table 4-6 Power Path Status Register Field Descriptions

Bit	Field	Type	Reset	Description
39-38	Power Source	R	0h	Indicates current PD Controller power source. NOTE: Since the Dead Battery flag forces PD Controller to be powered from VBUS, only 10b is valid when this flag is set. Any other setting indicates that the Dead Battery flag is not set. 0h = Reserved 1h = PD Controller is powered from VIN_3V3 2h = PD Controller is powered from VBUS 3h = Reserved
37-21	RESERVED	R	0h
20-18	RESERVED	R	0h
17-15	RESERVED	R	0h
14-12	PP3 Switch	R	0h	Indicates current state of PP3 (PP_EXT). 0h = PP3 switch disabled 1h = PP3 switch currently disabled due to fault 3h = PP3 switch enabled (system input)
11-0	RESERVED	R	0h

4.1.5 Received Source Capabilities Register (Offset = 30h) [Reset = 0000000000000000000000000000000000000000000000000000000000h]

Received Source Capabilities is shown in Table 4-7.

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Received Source Capabilties. This register stores latest Source Capabilities message received over BMC.

Table 4-7 Received Source Capabilities Register Field Descriptions

Bit	Field	Type	Reset	Description
231-200	Source PDO 7	R	0h	Seventh Source Capabilities PDO received
199-168	Source PDO 6	R	0h	Sixth Source Capabilities PDO received
167-136	Source PDO 5	R	0h	Fifth Source Capabilities PDO received
135-104	Source PDO 4	R	0h	Fourth Source Capabilities PDO received
103-72	Source PDO 3	R	0h	Third Source Capabilities PDO received
71-40	Source PDO 2	R	0h	Second Source Capabilities PDO received
39-8	Source PDO 1	R	0h	First Source Capabilities PDO received
7-3	RESERVED	R	0h
2-0	Number Valid PDOs	R	0h	Number of valid SPR PDOs in this register. Each PDO is 4 bytes. (max of 7)

4.1.6 Transmit Sink Capabilities Register (Offset = 33h) [Reset = 0000000000000000000000000000000000000000000000000000000002h]

Transmit Sink Capabilities is shown in Table 4-8.

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Sink Capabilities for sending. This register stores PDOs for outgoing Sink Capabilities USB PD messages. The PD controller transmits the contents of this register as a Sink_Capabilities message after receiving a Get_Sink_Cap message unless its configuration or USB PD rules require a different response in the context. Each PDO in this TX_SINK_CAPS register follows the definition from the USB PD specification. For more details on the meaning of each field refer to the USB PD specification.

Table 4-8 Transmit Sink Capabilities Register Field Descriptions

Bit	Field	Type	Reset	Description
231-200	TX Sink PDO 7	R/W	0h	SPR Seventh Sink Capabilities PDO contents.
199-168	TX Sink PDO 6	R/W	0h	SPR Sixth Sink Capabilities PDO contents.
167-136	TX Sink PDO 5	R/W	0h	SPR Fifth Sink Capabilities PDO contents.
135-104	TX Sink PDO 4	R/W	0h	SPR Fourth Sink Capabilities PDO contents.
103-72	TX Sink PDO 3	R/W	0h	SPR Third Sink Capabilities PDO contents.
71-40	TX Sink PDO 2	R/W	0h	SPR Second Sink Capabilities PDO contents.
39-8	TX Sink PDO 1	R/W	0h	SPR First Sink Capabilities PDO contents.
7-3	RESERVED	R	0h
2-0	Number Valid PDOs	R/W	2h	Number of valid PDOs in this register. Each PDO is 4 bytes. (max of 7)

4.1.7 Active PDO Contract Register (Offset = 34h) [Reset = 000000000000h]

Active PDO Contract is shown in Table 4-9.

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Power data object for active contract. This register stores PDO data for the current explicit USB PD contract, or all zeroes if no contract.

Table 4-9 Active PDO Contract Register Field Descriptions

Bit	Field	Type	Reset	Description
47-42	RESERVED	R	0h
41-32	First PDO Control Bits	R	0h	Contains PDO specific information of the first PDO. It does not matter which PDO was selected, this field is always drawn from the first PDO.
31-0	Active PDO	R	0h	Power data object. This field contains the contents of the PDO requested by PD controller as sink and accepted by source, once it is accepted by source.

4.1.8 Active RDO Contract Register (Offset = 35h) [Reset = 00000000h]

Active RDO Contract is shown in Table 4-10.

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Power data object for the active contract. This register stores the RDO of the current explicit USB PD contract, or all zeroes if no contract.

Table 4-10 Active RDO Contract Register Field Descriptions

Bit	Field	Type	Reset	Description
31-28	Object Position	R	0h	Corresponding PDO location in the Source_Capabilities Message.
27	Give Back Flag	R	0h	When set, the device will respond to a GotoMin message by reducing its load to minimum operating current
26	Capabality Missmatch	R	0h	Set when Source cannot satisfy the Sink's power or voltage requirements per Souce Capabilities
25	USB Communication Capable	R	0h	When set, the device has USB data lines and is capable of communicating using USB2, USB3 or USB4 protocols
24	No USB Suspend	R	0h	This flag is used to indicate what actions are taken in USB Suspend.
23	Unchunked Supported	R	0h	When set, the port supports chunked and unchucked messagse.
22-20	RESERVED	R	0h
19-10	Operating Current	R	0h	Operating current (10mA per LSB)
9-0	Max Min Operation Current	R	0h	Shall be assigned same as Operating Current field

4.1.9 Autonegotiate Sink Register (Offset = 37h) [Reset = 0000000000000036h]

Autonegotiate Sink is shown in Table 4-11.

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Configuration for sink power negotiations. This register defines the voltage range between which the system can function properly, allowing the PD Controller to negotiate its own contracts. The register is set by any power up settings and overwritten by customer configurations or MCU.

Table 4-11 Autonegotiate Sink Register Field Descriptions

Bit	Field	Type	Reset	Description
63-62	RESERVED	R	0h
61-52	Auto Neg Capabilities Mismatch Power	R/W	0h	Capabilities Mismatch Power Threshold. If the selected PDO offers less power than what is specified in this register, then the PD controller will assert the Capability Mismatch bit in its Request message unless NoCapabilityMismatch is set to 1. (250mW per LSB)
51-42	Auto Neg Min Voltage	R/W	0h	Minimum voltage to request. During PD power contract negotiation, the PD controller will only select voltages that are greater than or equal to the value specified in this field. Not used unless AutoComputeSinkMinVoltage=0. (50mV per LSB)
41-32	Auto Neg Max Voltage	R/W	0h	Maximum voltage to request. During PD power contract negotiation, the PD controller will only select voltages that are less than or equal to the value specified in this field. Not used unless AutoComputeSinkMinVoltage=0. (50mV per LSB) See description in AutoComputeSinkMinPower.
31-22	Auto Neg Sink Min Required Power	R/W	0h	Minimum operating power required by the Sink. The PD Controller will always attempt to receive this power level from the Source. (250mW per LSB)
21-12	Auto Neg Max Current	R/W	0h	Maximum current to request. The PD controller will not request more current than indicated by this field. The host should ensure that the max current for all PDO's in the TX_SINK_CAPS register do not exceed this value. (10mA per LSB).
11-8	RESERVED	R	0h
7	RESERVED	R	0h
6	Auto Disable Sink Upon Capability Mismatch	R/W	0h	Sink path and capability mismatch settings. If this bit is asserted, then any time the implicit or explicit power contract would cause the Capability Mismatch bit to be set the PD controller will disable the sinking path. This bit should only be asserted if the NoCapabilityMismatch bit is set to 0.
5	Auto Compute Sink Max Voltage	R/W	1h	Configuration for maximum voltage. The PD controller can automatically compute ANMaxVoltage, or allow the host to specify it. 0h = Provided by host 1h = Computed by PD controller
4	Auto Compute Sink Min Voltage	R/W	1h	Configuration for minimum voltage. The PD controller can automatically compute ANMinVoltage, or allow the host to specify it. 0h = Provided by host 1h = Computed by PD controller
3	No Capabality Mismatch	R/W	0h	Configuration for capability mismatch in RDO. There is one conditions that will trigger a capability mismatch: If the attached source does not offer a PDO whose power is greater or equal to the ANSinkCapMismatchPower field in this register. If the condition is true, then the PD controller will assert the capability mismatch bit in its request unless this bit is asserted. 0h = Capabiltiy mismatch enabled 1h = Capability mismatch disabled.
2	Auto Compute Sink Min Power	R/W	1h	Minimum power sink requires. The minimum sink power is the largest power reported in any valid PDO in the TX_SINK_CAPS (0x33). The power for a particular PDO from the TX_SINK_CAPS follows for each supply type: Battery Supply: OperatingPower Variable Supply: MaxVoltageOperatingCurrent Fixed Supply: VoltageOperatingCurrent. However, if the TX_SINK_CAPS register includes Battery supply type PDO(s), then ANSinkMinRequiredPower = maximum OperatingPower in a Battery supply type PDO. 0h = Provided by host 1h = Computed by PD controller
1	No USB Suspend	R/W	1h	Value used for the NoUSBSusp Flag in the RDO. This is as defined by USB PD.
0	Auto Neg RDO Priority	R/W	0h	Configuration for tie-breaker in PDO selection. The PD controller will find the set of PDOs that fulfill the voltage requirements. From that set of PDOs it will pick the one with higher power. If two acceptable PDOs have the same power, Fixed Supply Type is preferred, and then Variable Supply has second preference. If two PDOs have the same power and the same type, then this bit determines which PDO is selected. 0h = Higher voltage 1h = Lower voltage

4.1.10 PD Status Register (Offset = 40h) [Reset = 00000000h]

PD Status is shown in Table 4-12.

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Status of PD and Type-C state-machine. This register contains details regarding the status of PD messages and the Type-C state machine.

Table 4-12 PD Status Register Field Descriptions

Bit	Field	Type	Reset	Description
31-28	RESERVED	R	0h
27-22	Error Recovery Details	R	0h	Reason for Error Recovery 0h = reset value: no error recovery 3h = System: fault input GPIO was asserted 4h = System: Over-voltage detected on the Px_VBUS pin 8h = System: OVP on CC detected
21-16	Hard Reset Details	R	0h	Reason for Hard Reset 0h = Reset value no hard reset 1h = Received from Port Partner 2h = Requested by host 3h = DR_Swap Message is a received when there is an active mode between the port-partners 4h = The source output voltage failed to settle at vSrcNew within tSrcSettle during high-low voltage transition. Applicable only when the port role is SRC 6h = The port-partner did not respond to SoftReset message with Accept within tSenderResponse time 7h = The port-partner did not respond to Request message with Accept within tSenderResponse time 8h = The port-partner did not respond to Accept message with PS_RDY within tPSTransition time 9h = The port-partner did not send Source_Capabilities message for a duration of tTypeCSinkWaitCap after presenting VBUS Ah = The port-partner did not respond to SoftReset messsage after nRetryCount attempts 11h = An unexpected message is received during power transitions
15-13	RESERVED	R	0h
12-8	Soft Reset Details	R	0h	Reason for Soft Reset 0h = Reset value no soft reset 1h = Soft reset received from Port Partner 2h = Reserved 3h = Reserved 4h = Received source capabilities message was invalid 6h = Received an accept message unexpectedly 7h = Received a control message unexpectedly 8h = Received a GetSinkCap message unexpectedly 9h = Received a GetSourceCap message unexpectedly Ah = Received a GotoMin message unexpectedly Bh = Received a PS_RDY message unexpectedly Ch = Received a Ping message unexpectedly Dh = Received a Reject message unexpectedly Eh = Received a Request message unexpectedly Fh = Received a Sink Capabilities message unexpectedly 10h = Received Source Capabilities message unexpectedly 11h = Received a Swap message unexpectedly 12h = Received a Wait Capabilities message unexpectedly 13h = Received an unknown control message 14h = Received an unknown data message 17h = Received an Extended message unexpectedly 18h = Received an unknown Extended message 19h = Received a data message unexpectedly 1Ah = Received a Not Supported message unexpectedly 1Bh = Received a Get_Status message unexpectedly
7	RESERVED	R	0h
6	Present PD Role	R	0h	Present PD power role. The PD Controller is acting under this PD power role. 0h = Sink
5-4	Port Type	R	0h	Present Type-C power role. The PD Controller is acting under this Type-C power role. 1h = Sink
3-2	CC Pullup	R	0h	CC Pull-up value. The pull-up value detected by PD Controller when in CC Pull-down mode. 0h = Not in CC pull-down mode / no CC pull-up detected 1h = USB Default current 2h = 1.5 A (SinkTxNG) 3h = 3.0 A (SinkTxOK)
1-0	RESERVED	R	0h