SNOA949 May   2016 LDC1312 , LDC1312-Q1 , LDC1314 , LDC1314-Q1 , LDC1612 , LDC1612-Q1 , LDC1614 , LDC1614-Q1

 

  1.   Power Reduction Techniques for the Multichannel LDCs in Inductive Sensing Applications
    1.     Trademarks
    2. 1 Introduction
    3. 2 Duty Cycling
      1. 2.1 Operational Parameters That Affect Duty Cycling
    4. 3 Clock Gating
    5. 4 Test Setup
    6. 5 Measurement Results
      1. 5.1 Measurements with Internal Clock
      2. 5.2 Current Consumption Measurements vs Data Conversion Time
        1. 5.2.1 Data Readback Overhead
        2. 5.2.2 Comparison of Measured and Estimated Current Consumption
          1. 5.2.2.1 Estimating Current Consumption
        3. 5.2.3 Results
    7. 6 Summary

Clock Gating

If an external oscillator is used, a second important technique in reducing the power consumption of the LDC is gating the external reference clock. Simply put, the reference clock is also put into a sleep state whenever the LDC is placed into a sleep state. This not only reduces the power consumed by the external clock, but also significantly reduces the leakage current from the LDC.