SNLU301 November   2021 SN75LVPE5412 , SN75LVPE5421

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Description
    1. 2.1  Redriver-Mux 5-Level I/O Control Inputs
    2. 2.2  Redriver-Mux Modes of Operation
    3. 2.3  Redriver-Mux SMBus or I2C Register Control Interface
    4. 2.4  Redriver-Mux Equalization Control
    5. 2.5  Redriver-Mux RX Detect State Machine
    6. 2.6  Redriver-Mux DC Gain Control
    7. 2.7  DS320PR412-421EVM Global Controls
    8. 2.8  DS320PR412-421EVM Downstream Devices Control
    9. 2.9  DS320PR412-421EVM Upstream Devices Control
    10. 2.10 Quick-Start Guide (Pin Mode)
    11. 2.11 Quick-Start Guide (SMBus Slave Mode)
  4. 3Schematics
  5. 4PCB Layouts
  6. 5Bill of Materials

2.8 DS320PR412-421EVM Downstream Devices Control

Table 2-8 shows DS320PR412-421EVM downstream devices controls that affect DS1 and DS2 devices on the board.

Table 2-8 EVM Downstream Devices Controls
COMPONENTNAMEFUNCTION OR DESCRIPTION
JMP1DS320PR412_0 EQ0_ADDR_01-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
JMP2DS320PR412_0 EQ11-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
JMP3DS320PR412_0 MODE1-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
J30DS320PR412_0 RX_DET_SCL_01-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
9-10: SCL
J23DS320PR412_0 GAIN_SDA1-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
9-10: SDA
JMP4DS320PR412_1 EQ0_ADDR_01-2: L0 3-4: L1 5-6: L27-8: L3 N/C: L4
JMP5DS320PR412_1 EQ11-2: L0 3-4: L1 5-6: L27-8: L3 N/C: L4
JMP6DS320PR412_1 MODE1-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
J24DS320PR412_1 RX_DET_SCL_01-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
9-10: SCL
J25DS320PR412_1 GAIN_SDA1-2: L0
3-4: L1
5-6: L2
7-8: L3
N/C: L4
9-10: SDA