For encoding applications, binary output devices like latches or switches are used. Within a latch, a single Hall element or an averaged group of Hall elements may be used to measure the field along a single sensing axis. Downstream of the Hall element block within the latch device will be a comparator circuit that determines whether the transduced signal exceeds B_OP or falls below B_RP, thereby producing an output that is either high or low. If the ring magnet or linear array magnet is designed to move in only one direction, then the position can be determined. However, for systems in which the magnet can reverse direction (see Figure 1-1), the device output alone provides insufficient information to definitively determine position.

Consequently, Figure 1-2 shows how a minimum of two latches are used to determine not only position but speed and direction. In the past, this might have been implemented with two discrete devices (see Figure 1-3); however, recent devices have evolved such that a single device may have two distinct Hall element blocks that measure the field at two independent locations (see Figure 1-4). This advancement has led to a reduced bill of materials (BOM) count, reduced board size, and minimized design complexity.

Position resolution is dictated by the orientation of the Hall element blocks within the device. To understand why, you must first recall the concept of phase. Figure 2-1 shows two sine waves which are similar in shape to the magnetic field measured by a Hall element in an encoding application. In Figure 2-1, the black curve lags behind the yellow curve. As the period is equivalent for both periodic signals, the lag is equivalent to the phase offset. Therefore, the black curve has a π/2=90° phase offset. Maintaining 90° offset is imperative for equal separation between latch states as indicated at the bottom of Figure 2-1.

Figure 2-1 Phase Lag and Offset Example

Figure 2-2 shows what kind of output you might observe with a dual planar latch, assuming both Hall element blocks operate like a typical discrete latch.

The Hall elements are confined to a subregion of a small device package, therefore their physical separation will be miniscule. In most cases, this leads to signals with very small phase offsets and unequal state intervals as shown in the bottom of Figure 2-2.

Consequently, Figure 2-3 shows that dual planar devices typically monitor one Hall element block for speed and position, while another pin is used for direction. The speed element will generate a state change on one device output every time the detected polarity and magnitude crosses the opposing B_OP or B_RP threshold. The direction element also is similarly monitored; however, the B_OP or B_RP comparator output is kept internal to the device and fed to some other circuitry that compares both speed and direction signals. This setup can determine if the order of the rising and falling edges have reversed. This circuitry will then provide a device output that is high when the magnet is moving in one direction, or low when the magnet is moving in the opposite direction. Therefore, dual planar devices exhibit only two resolution steps from the speed hall element per pole pair traversed, which is half of what is possible for two Hall element block devices.

Despite the resolution limitation with a dual planar device, maximal resolution is still possible from a single 2D latch device. For a 2D device like the TMAG5110 or the TMAG5111 that has orthogonal planes, it is possible to get an unconditional 90° phase shift. Figure 2-4 illustrates why this is the case. Hall element 1 that is parallel to the magnet array measures a local maximum at a pole center, while the Hall element that is perpendicular to the magnet array measures a local minimum at a pole center.

Aside from resolution, device orientation relative to the encoding magnet can impact device functionality. To illustrate this point, Figure 2-5 shows a configuration in which a 2D latch will typically work while a dual planar will typically not. The dual planar fails to work in this configuration because the device can only sense along the axis orthogonal to the top of the package surface. In this instance, the magnetic field is mostly parallel to the Hall element plane and any vertical component that is normal to Hall elements and detectable is in phase. The 2D latch has 3 orthogonal sensing axes, therefore it is possible to detect the field components that are out of phase (see Figure 2-5).

To summarize the orientation limitations of the dual planar, Table 2-1 lists the configurations in which it may be difficult or impossible to successfully use dual planar. Figure 2-6, Figure 2-7, Figure 2-8, Figure 2-9, Figure 2-10, and Figure 2-11 show these various configurations listed in Table 2-1.

Another key specification for Hall-effect latches is the threshold for B_OP or B_RP. These specifications dictate what field strength is required for the device output to go high or low. The region between these thresholds is the hysteresis region where the last crossed threshold state is maintained. The lower the device thresholds, the further the device can be spaced from the ring magnet.

To illustrate the impact, Figure 3-2 show the regions within a plane indicated in Figure 3-1 spaced 3 mm from the outer radial surface of a 10-pole, 400-mT Br, 1.59-mm inner diameter, 37.8579-mm outer diameter magnet where devices can be placed for encoding measurements. With each decrease in the B_OP and B_RP threshold, there is an increase in the possible device placement region size.