SLVAF74 July   2021 TPS2372 , TPS2373 , TPS23730 , TPS23731 , TPS23734 , TPS2375 , TPS2375-1 , TPS23750 , TPS23751 , TPS23752 , TPS23753A , TPS23754 , TPS23754-1 , TPS23755 , TPS23756 , TPS23757 , TPS23758 , TPS2376 , TPS2376-H , TPS2377 , TPS2377-1 , TPS23770 , TPS2378 , TPS2379

 

  1.   Trademarks
  2. 1Introduction
  3. 2Preparation and Measurement Techniques
    1. 2.1 Important PoE Signals
    2. 2.2 Lab Equipment
    3. 2.3 Measurement Techniques
    4. 2.4 Board Preparation
  4. 3Narrowing Down the Problem Area
    1. 3.1 Schematic Areas
    2. 3.2 Narrowing Down the Area On Board
  5. 4Common Issues
  6. 5Conclusion

1 Introduction

This guide has three main parts. The first part is the preparation work before debugging. Sometimes the preparation work can take an hour or more, but good preparation decreases overall debugging time. The second part of the guide covers the first part of the debug process: narrowing down what is causing the issue. PoE plus DC/DC designs can be broken up into sections, and this application report guides you through how to check if one or more of these sections are suspect in the problem. The third part of this guide covers common issues and common resolutions. For example, if the design has the parallel MOSFET in an active clamp forward that breaks during shutdown, what are the issues that usually cause that? This list is not exhaustive because there are many components in PoE designs and they can break in different ways and for different reasons. However, this guide should aid in the first steps of the debug process for most PoE designs.

Note: This document only covers flybacks and active clamp forward topologies. These are the main two topologies used in PoE applications because they provide good comprises of size, cost, and performance for a nominal PoE input voltage range (37 V–57 V) to a typical output voltage range (3.3 V–24 V) while providing isolation.