SLVAF44 April   2021 TPS5432

 

  1.   Trademarks
  2. 1Introduction
  3. 2Load Release Characteristics of SoC Chipset
  4. 3Unexpected Protection Behavior During the Load Release of SoC Chipset
  5. 4Investigation on a Long-Term Reliability
  6. 5Design Approaches to Improve the Load Release Characteristics of SoC Chipset
  7. 6Conclusion
  8. 7References

Load Release Characteristics of SoC Chipset

Figure 2-1 (left) shows 1.2Vo rail for SoC core voltage during power on and off sequence as shown in Figure 2-1 (right). The Inductor current is sharply changed from a full load condition to a light load condition before 1.2Vo rail is trued off. It is a unique load characteristics caused by SoC chipset.

GUID-20210221-CA0I-LVD8-FPZ9-CMWFPPXLPR71-low.png Figure 2-1 SoC core Voltage During Power On and Off Sequence