SLVAF11 June   2021 TPS51397A , TPS566231 , TPS566235 , TPS566238 , TPS568230

 

  1.   Trademarks
  2. 1Introduction
  3. 2Open Loop Frequency Response of D-CAP2 and D-CAP3 Converter
  4. 3Method to Choose LC Value for Loop Stability
    1. 3.1 Limits of Output Capacitance
    2. 3.2 Phase Margin Estimation Method
  5. 4Example of LC Design Method for D-CAP3 Converter
  6. 5Simulation and Experimental Verification
  7. 6Summary
  8. 7References
  9. 8Appendix A

4 Example of LC Design Method for D-CAP3 Converter

TPS568230 is used as the example. Vin=12V, Vo=1.5V, fsw=600kHz, Ioutmax=8A.

First, choose inductance to let the inductor current ripple equal to 20%-40% of max loading current. The inductance value can be derived as Equation 21.

Equation 21. GUID-20210220-CA0I-ZH3P-27FS-QJMCTLZH9QDB-low.gif

Substituting the parameters into Equation 21, it can be calculated that 0.68uH< L<1.36uH. Choose L=1uH. Choose inductor 744311100 and its DCR is 4.6mOhm. Substituting inductance and DCR into Equation 11 and Equation 15, we can get the range of output capacitance as 35uF< Co<163uF.

Choose output capacitance Co=110uF. Here 5 parallel 22uF MLCC with 10V rated voltage are used and ESR of each one is about 3mohm. The total ESR is 0.6mohm.

For the estimation of phase margin and crossover frequency, the degrading of inductor and capacitor needs to be considered. With only 1.5 V DC bias, the degrading of output capacitor can be ignored. Degrading curve of inductance with increasing current is shown in Figure 4-1. The inductance is about 0.86uH at 8A loading.

GUID-20210128-CA0I-DKTN-VZ4Z-CZ5RN7B7DPRP-low.gif Figure 4-1 Degrading Curve of Inductance with Increasing Current

It can be calculated that the crossover frequency is 77kHz according to Equation 14 and phase margin is 57.7 degree according to Equation 19.

The application design method can be concluded as the flow chart in Figure 4-2.

Figure 4-2 Flow Chart for Application Design of D-CAP2/D-CAP3 Converter