SLVAF11 June   2021 TPS51397A , TPS566231 , TPS566235 , TPS566238 , TPS568230

 

  1.   Trademarks
  2. 1Introduction
  3. 2Open Loop Frequency Response of D-CAP2 and D-CAP3 Converter
  4. 3Method to Choose LC Value for Loop Stability
    1. 3.1 Limits of Output Capacitance
    2. 3.2 Phase Margin Estimation Method
  5. 4Example of LC Design Method for D-CAP3 Converter
  6. 5Simulation and Experimental Verification
  7. 6Summary
  8. 7References
  9. 8Appendix A

2 Open Loop Frequency Response of D-CAP2 and D-CAP3 Converter

GUID-20210128-CA0I-QBQ4-7ZKX-B6R2NK7GSWCM-low.gif Figure 2-1 Control Diagram of D-CAP2 Converter

Diagram of buck converter with D-CAP2 control scheme is shown as Figure 2-1 . The open loop transfer function was derived in application report [2], as shown in Equation 1.

Equation 1. GUID-20210220-CA0I-NFMR-ZZV6-SX2L9XFR370C-low.gif

where Gdv(s) is the transfer function from Duty to Vo, well known using state-space averaging model.

Hd(s) =e-sTon/2: Delay factor of fixed on time

Tc: Time constant block of ripple injection circuit in D-CAP2

Acp: Voltage compression block of ripple injection circuit in D-CAP2

HFB(s): Transfer function of feedback divider network

The expression of Gdv(s) is shown as Equation 2.

Equation 2. GUID-20210220-CA0I-Q5HG-SZKQ-R10CLMM04ZDB-low.gif

where

Equation 3. GUID-20210220-CA0I-7DQH-DR4P-DMNM5QD55KK4-low.gif

RL is the load resistance, rL is DC resistance of the inductor, rc is ESR of output capacitor.

A pair of double poles (conjugate poles) and a zero formed by ESR of output capacitor are included in the transfer function Gdv(s). The angular frequency of the double poles and the zero formed by ESR are shown as Equation 4 and Equation 5.

Equation 4. GUID-20210220-CA0I-NPKG-FNPV-39G0HHCM2XBC-low.gif
Equation 5. GUID-20210220-CA0I-ZBJ1-KVSG-HL2CGW2GRWTM-low.gif

A zero is formed by the time constant block of ripple injection in D-CAP2 control mode, the angular frequency of the zero is:

Equation 6. GUID-20210220-CA0I-GWPF-C59T-0HG3SFGGLM6S-low.gif

ωesr is at high frequency range in most cases. ω0 and ωRI are the dominant poles and zero to determine bandwidth and phase margin. The bode plot of open loop transfer function for D-CAP2 converter is shown as Figure 2-2.

GUID-20210128-CA0I-9PLK-SJGK-FNS6K1KZGB5L-low.gif Figure 2-2 Bode plot of D-CAP2 Converter

To enhance DC accuracy of output voltage, D-CAP3 is proposed and widely used in TI’s current products. Compared with D-CAP2, the DC error correction performance is further improved in D-CAP3. By adding additional poles and zeros at low frequency range, the gain at low frequency range is increased to achieve better ability for DC error correction. But the characteristics of gain and phase at middle frequency and high frequency are almost same as D-CAP2 converter. The bode plot of open loop transfer function is shown as Figure 2-3.

GUID-20210128-CA0I-TFMQ-D30F-W4LCJ8K0DDPG-low.gif Figure 2-3 Bode plot of D-CAP3 Converter

Phase margin is the phase at crossover frequency and it is one of the most important value for system stability evaluation. Since the crossover frequency is at middle frequency or high frequency, the impacts of additional zeros and poles at low frequency in D-CAP3 control mode on stability analysis can be ignored. Thus the application design method for D-CAP3 stability is same as that of D-CAP2. The analysis and design method in this application report can be applied on converters using either D-CAP2 or D-CAP3 control.