SLVA528D September   2012  – August 2021 TPS65381-Q1 , TPS65381A-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Product Overview
    1. 2.1 Safety Functions and Diagnostics Overview
    2. 2.2 Target Applications
    3. 2.3 Product Safety Constraints
  4. 3Development Process for Management of Systematic Faults
    1. 3.1 TI New-Product Development Process
  5. 4TPS65381x-Q1 Product Architecture for Management of Random Faults
    1. 4.1 Device Operating States
    2.     Device Operating States (continued)
    3. 4.2 NRES (MCU Reset) Driver and ENDRV (SAFING Path Enable) Driver
  6. 5TPS65381x-Q1 Architecture Safety Mechanisms and Assumptions of Use
    1. 5.1 Power Supply
    2. 5.2 Regulated Supplies
      1. 5.2.1 VDD6 Buck Switch-Mode Supply
      2. 5.2.2 VDD5 Linear Supply
      3. 5.2.3 VDD3/5 Linear Supply
      4. 5.2.4 VDD1 Linear Supply
      5. 5.2.5 VSOUT1 Linear Supply
      6. 5.2.6 Charge Pump
    3. 5.3 Diagnostic, Monitoring, and Protection Functions
      1. 5.3.1 External MCU Fault Detection and Management
        1. 5.3.1.1 External MCU Error Signal Monitor (MCU ESM)
        2. 5.3.1.2 Watchdog Timer
      2. 5.3.2 Voltage Monitor (VMON)
      3. 5.3.3 Loss-of-Clock Monitor (LCMON)
      4. 5.3.4 Junction Temperature Monitoring and Current Limiting
      5. 5.3.5 Analog and Digital MUX (AMUX and DMUX) and Diagnostic Output Pin (DIAG_OUT)
      6. 5.3.6 Analog Built-In Self-Test (ABIST)
      7. 5.3.7 Logic Built-In Self-Test (LBIST)
      8. 5.3.8 Device Configuration Register Protection
  7. 6Application Diagrams
    1. 6.1 TPS65381x-Q1 With TMS570
    2. 6.2 TPS65381x-Q1 With C2000
    3. 6.3 TPS65381x-Q1 With TMS470
  8. 7TPS65381x-Q1 as Safety Element out of Context (SEooC)
    1. 7.1 TPS65381x-Q1 Used in an EV/HEV Inverter System
    2. 7.2 SPI Note
  9. 8Revision History

4.2 NRES (MCU Reset) Driver and ENDRV (SAFING Path Enable) Driver

The ENDRV pin features a read-back circuit to compare the external ENDRV level with the internally applied ENDRV level. This feature is to detect a possible failure in the ENDRV pullup or pulldown components. The MCU can detect a failure by applying an appropriate diagnostic routine while the TPS65381x-Q1 device is in the DIAGNOSTIC state. This can be done by decrementing the WD_FAIL_CNT[2:0] counter to less than five and setting the ENABLE_DRV bit to ensure the ENDRV pin goes high, then the MCU causes the WD_FAIL_CNT[2:0] counter to increment greater than four and makes sure the ENDRV pin goes low. The MCU then clears the ENABLE_DRV bit until the full DIAGNOSTIC routine is complete and the system is ready to transition to normal operation. For normal operation the MCU commands the TPS65381x-Q1 device to transition to the ACTIVE state and then resets the ENABLE_DRV bit to 1. The NRES output is normally used to reset the MCU when the TPS65381x-Q1 device detects faults that cause the device to transition to the RESET or STANDBY state.

GUID-F9293982-04E2-40DA-A872-E4632F59C729-low.gifFigure 4-2 Reset (NRES) and Enable (ENDRV) Circuit