SLAZ627W September   2014  – August 2021 MSP430FR6972

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC38
    2. 6.2  ADC42
    3. 6.3  ADC43
    4. 6.4  ADC64
    5. 6.5  ADC66
    6. 6.6  ADC67
    7. 6.7  ADC69
    8. 6.8  ADC70
    9. 6.9  ADC71
    10. 6.10 AES1
    11. 6.11 COMP7
    12. 6.12 COMP10
    13. 6.13 CPU21
    14. 6.14 CPU22
    15. 6.15 CPU40
    16. 6.16 CPU46
    17. 6.17 CPU47
    18. 6.18 CS7
    19. 6.19 CS12
    20. 6.20 DMA7
    21. 6.21 EEM19
    22. 6.22 EEM23
    23. 6.23 EEM27
    24. 6.24 EEM30
    25. 6.25 EEM31
    26. 6.26 GC4
    27. 6.27 GC5
    28. 6.28 JTAG27
    29. 6.29 PMM24
    30. 6.30 PMM27
    31. 6.31 PMM31
    32. 6.32 PMM32
    33. 6.33 PORT28
    34. 6.34 REF9
    35. 6.35 RTC10
    36. 6.36 RTC12
    37. 6.37 TB25
    38. 6.38 USCI41
    39. 6.39 USCI42
    40. 6.40 USCI45
    41. 6.41 USCI47
    42. 6.42 USCI50
  7. 7Revision History

6.8 ADC70

ADC Module

Category

Functional

Function

DMA gets stuck when switching between ADC data transfer trigger types

Description

If the ADC performs a data transfer by the CPU ,e.g. via interrupt or flag polling,
AND
the ADC is then configured for an edge-triggered DMA transfer
THEN
the DMA cannot be triggered and no data transfer will occur.

Workaround


1. Do not switch between the ADC triggered CPU data transfer and ADC triggered DMA data transfer to avoid this condition. Or,
2. Apply a POR reset to clear the trigger DMA trigger logic inside the ADC. Or,
3. Perform a dummy DMA transfer via level trigger option (DMAxCTL.DMALEVEL=1) to clear ADC trigger logic. In this case, it is recommended to throw out current ADC conversion and ignore the data of the DMA dummy transfer.