SLAZ409K October   2012  – May 2021 MSP430G2153

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RHB32
      2.      N20
      3.      PW20
      4.      PW28
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  CPU4
    3. 6.3  EEM20
    4. 6.4  SYS15
    5. 6.5  TA12
    6. 6.6  TA16
    7. 6.7  TA21
    8. 6.8  TAB22
    9. 6.9  USCI20
    10. 6.10 USCI22
    11. 6.11 USCI23
    12. 6.12 USCI24
    13. 6.13 USCI25
    14. 6.14 USCI26
    15. 6.15 USCI29
    16. 6.16 USCI30
    17. 6.17 USCI34
    18. 6.18 USCI35
    19. 6.19 USCI40
    20. 6.20 XOSC5
  7. 7Revision History

USCI40

USCI Module

Category

Functional

Function

SPI Slave Transmit with clock phase select = 1

Description

In SPI slave mode with clock phase select set to 1 (UCAxCTLW0.UCCKPH=1), after the first TX byte, all following bytes are shifted by one bit with shift direction dependent on UCMSB. This is due to the internal shift register getting pre-loaded asynchronously when writing to the USCIA TXBUF register. TX data in the internal buffer is shifted by one bit after the RX data is received.

Workaround

Reinitialize TXBUF before using SPI and after each transmission.
If transmit data needs to be repeated with the next transmission, then write back previously read value:


UCAxTXBUF = UCAxTXBUF;