SLAA998 May 2021 DAC43701 , DAC43701-Q1 , DAC53701 , DAC53701-Q1
The table lists the register configuration of the TPL1401 for appliance LED fade-in fade-out.
Register Address | Register Name | Setting | Description |
---|---|---|---|
0xD1 |
GENERAL_CONFIG |
0x0164 |
[15:14] 0b00: Selects the type of waveform to be generated by the continuous waveform generator (CWG) |
[13] 0b0: Write 0b0 to lock device. Unlock by writing 0b0101 to DEVICE_UNLOCK_CODE field in the PROTECT register | |||
[11:9] 0b000: Selects the code step used for programmable slew rate control | |||
[8:5] 0b1011: Selects the code step used for programmable slew rate control | |||
[4:3] 0b00: Powers up the device output | |||
[2] 0b1: Disables the internal reference | |||
[1:0] 0b00: Selects the gain to be applied to the internal reference | |||
[12] 0b0: Write 0b0 to enable PMBus mode | |||
0xD2 |
CONFIG2 |
0x1000 |
[15:14] 0b00: Configures the device I2C address |
[13:11] 0b010: Configures the GPI pin as Margin-High, Low trigger | |||
[9] 0b0: Write 0b1 to generate a medium priority medical alarm | |||
[8] 0b0: Write 0b1 to generate a medium priority medical alarm | |||
[7:6] 0b00: Always write 0b00 | |||
[5:4] 0b00: Selects the interburst time for medical alarms | |||
[3:2] 0b00: Selects the pulse off time for medical alarms | |||
[1:0] 0b00: Selects the pulse on time for medical alarms | |||
[10] 0b0: Write 0b1 to generate a high priority medical alarm | |||
0xD3 |
TRIGGER |
0x0408 |
[15:12] 0b0000: Write 0b0101 to unlock the device |
[11] 0b0: Don't care | |||
[10] 0b1: Write 0b1 to enable the GPI pin | |||
[9] 0b0: Write 0b1 to load all registers with factory reset values | |||
[8] 0b0: Write 0b1 to enable continuous waveform generation mode | |||
[7] 0b0: Write 1 to initiate PMBus MARGIN_HIGH command | |||
[6] 0b0: Write 1 to initiate PMBus MARGIN_LOW command | |||
[4] 0b1: Write 0b1 to store applicable register settings to the NVM | |||
[3:0] 0b0000: Write 0b1000 to reset registers with existing NVM settings or default settings | |||
[5] 0b0: Write 0b1 to reload applicable registers with existing NVM settings | |||
0x25 |
DAC_MARGIN_HIGH |
0x08CC |
[15:12] 0b0000: Don't care |
[11:2] 0x8CC: 10-bit data updates the MARGIN_HIGH code | |||
[1:0] 0b00: Don't care | |||
0x26 |
DAC_MARGIN_LOW |
0x0468 |
[15:12] 0b0000: Don't care |
[11:2] 0x468: 10-bit data updates the MARGIN_LOW code | |||
[1:0] 0b00: Don't care |