SFFSAW0A December   2025  – December 2025 TPSI2260-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TPSI2260-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Note: When a pin short-to-ground case is discussed, only the primary side ground shorts are considered.
Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Below is the TPSI2260-Q1 pin diagram package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPSI2260-Q1 data sheet.

TPSI2260-Q1 TPSI2260-Q1 Pin Diagram Figure 4-1 TPSI2260-Q1 Pin Diagram
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VDD1The device is in the OFF state (UVLO), the secondary-side switch is in the OFF state.B
GND2There is no effect on the device.D
EN3The device is in the OFF state, the secondary-side switch is in the OFF state.B
NC/GND4There is no effect on the device.D
NC/GND5There is no effect on the device.D
NC/GND6There is no effect on the device.D
NC/GND7There is no effect on the device.D
GND8There is no effect on the device.D
S29

N/A

N/A

SM10

N/A

N/A

S111

N/A

N/A

Table 4-3 Pin FMA for Device Pins Short-Circuited to VDD
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VDD1There is no effect on the device.D
GND2The device is in the OFF state (UVLO), the secondary-side switch is in the OFF state.B
EN3The device is in the ON state, the secondary-side switch is in the ON state.B
NC/GND4There is no effect on the device.D
NC/GND5There is no effect on the device.D
NC/GND6There is no effect on the device.D
NC/GND7There is no effect on the device.D
GND8The device is in the OFF state (UVLO), the secondary-side switch is in the OFF state.B
S29

N/A

N/A

SM10

N/A

N/A

S111

N/A

N/A

Table 4-4 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
VDD1The device is in the OFF state (UVLO), the secondary-side switch is in the OFF state.B
GND2The device is in the OFF state, the secondary-side switch is in the OFF state.D
EN3The device is in the OFF state, the secondary-side switch is in the OFF state.B
NC/GND4There is no effect on the device.D
NC/GND5There is no effect on the device.D
NC/GND6There is no effect on the device.D
NC/GND7There is no effect on the device.D
GND8There is no effect on the device.D
S29There is no effect on the device.D
SM10There is no effect on the device.D
S111There is no effect on the device.D
Table 4-5 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted to Pin No.Description of Potential Failure EffectsFailure Effect Class
VDD12The device is in the OFF state (UVLO), the secondary-side switch is in the OFF state.B
GND23There is no effect on the device.B
EN34No effect if pin 4 is NC, if pin 4 is GND the device is in the OFF state, the secondary-side switch is in the OFF state.D
B
NC/GND45There is no effect on the device.D
NC/GND56There is no effect on the device.D
NC/GND67There is no effect on the device.D
NC/GND78There is no effect on the device.D
GND89

N/A

N/A

S2910The device is only capable of blocking positive voltage from the S1 to S2 pins when the switches are OFF.C
SM1011The device is only capable of blocking negative voltage from the S1 to S2 pins when the switches are OFF.C
S1111

N/A

N/A