1 Overview

This document contains information for TPS3842-Q1 (DRL package) to aid in a functional safety system design. Information provided are:

• Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
• Component failure modes and distribution (FMD) based on the primary function of the device
• Pin failure mode analysis (pin FMA)

Figure 1-1 and Figure 1-2 show the device functional block diagram for reference.

Figure 1-1 Adjustable Threshold Functional Diagram

Figure 1-2 Fixed Threshold Functional Diagram

TPS3842-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.