4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the UCC1424x-Q1 (DWN-36 package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to ground (see Table 4-2)
Pin open-circuited (see Table 4-3 )
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to supply (see Table 4-5 )

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality
B	No device damage, but loss of functionality
C	No device damage, but performance degradation
D	No device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

The device is configured as Dual Adjustable Output Configuration diagram in the Typical Application sestion of the datasheet
VIN is considered as the supply pin for primary-side pins
GNDP is considered as the ground pin for primary-side pins
VDD is considered as the supply pin for secondary-side pins
VEE is considered as the ground pin for secondary-side pins