SFFS433 March   2022 TMP127-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOT-23 Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOT-23 Package

4.1 SOT-23 Package

Figure 4-1 shows the TMP127-Q1 pin diagram for the SOT-23 package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TMP127-Q1 data sheet.

Figure 4-1 Pin Diagram (SOT-23) Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
SCLK

4

 SCLK stuck low. No SPI communication with device possible. B
CS 1 CS stuck low. Normal operation. SPI communication still functional. However, SPI of device cannot be actively reset anymore by taking CS high and low again. C
GND 2 No effect. Normal operation. D

VDD

 5 Device unpowered. Device not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A

SIO

 3 SIO stuck low. No SPI communication back to SPI master possible. Increase in supply current when SIO tries to drive high. Device damage plausible if SIO drives high for extended period of time. A
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
SCLK 4 State of SCLK input undetermined. No SPI communication with device possible. B
CS 1 State of CS input undetermined. SPI communication corrupted. B
GND 2 Device functionality undetermined. Device may be unpowered or connect to ground internally through alternate pin ESD diode and power up. B

VDD

 5 Device functionality undetermined. Device unpowered if all external analog and digital pins are held low. Device may power up through internal ESD diodes to VDD if voltages above the device's power-on reset threshold are present on any of the analog or digital pins. B

SIO

 3 State of SIO output undetermined. No SPI communication back to SPI master possible. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
SCLK 4 VDD SCLK stuck high. No SPI communication with device possible. B
CS 1 GND CS stuck low. Normal operation. SPI communication still functional. However SPI of device cannot be actively reset anymore by taking CS high and low again. C
GND 2 CS If CS is low then normal operation. If CS is high then device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A

VDD

 5 SCLK If SCLK is high then normal operation. If SCLK is low then device unpowered. Device not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A

SIO

 3 GND SPI communication corrupted. No SPI communication with device possible. Increase in supply current possible when SIO tries to drive high. Device damage plausible if this condition exists for extended period of time. A
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
SCLK 4 SCLK stuck high. No SPI communication with device possible. B
CS 1 CS stuck high. No SPI communication with device possible B
GND 2 Device functionality undetermined. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A

VDD

 5 No effect. Normal operation. B

SIO

 3 SIO stuck high. No SPI communication back to SPI master possible. Increase in supply current when SIO tries to drive low. Device damage plausible if SIO drives low for extended period of time. B