SFFS145 November   2021 TCAN1162-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TCAN1162-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to VSUP supply (see Table 4-5)
  • Pin short-circuited to VIO supply (see Table 4-6)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TCAN1162-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TCAN1162-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • All conditions are within recommended operating conditions
  • VSUP = see recommended conditions in device datasheet
  • VIO = 1.7 to 5.5 V
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD 1 Device will enter dominant timeout mode. Unable to transmit data from processor to CAN bus B
GND 2 None D
VFLT 3 Internal power rail held to ground, which results in unpowered device and high ISUP current. No communication with device or CAN bus possible B
RXD 4 Transceiver output biased dominant. Unable to send data from CAN bus to processor B
VIO 5 Digital pins unpowered, high IIO current. No communication between device and processor possible B
TS 6 Transceiver status output held at ground. Unable to signal ready transceiver to processor B
INH 7 INH will not function, excessive VSUP current and not able to perform power enable function B
NC 8 This pin should be left floating or pulled to ground D
WAKE 9 Will not be able to transition to high, which will not allow device to recognize a local wake up function B
VSUP 10 Device unpowered, high ISUP current B
NC 11 This pin should be left floating or pulled to ground D
CANL 12 VO(REC) spec violated. Degraded EMC performance C
CANH 13 Device cannot drive dominant to the bus, no communication possible B
nSLP 14 Part held in sleep mode. Part will not wake up, resulting in CAN bus communication failure B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD 1 Unable to trtansmit data from processor to CAN bus B
GND 2 Device is unpowered B
VFLT 3 Degraded EMC performance with no capacitor C
RXD 4 Unable to send data from CAN bus to processor B
VIO 5 Digital pins unpowered. No communication between device and processor possible B
TS 6 Transceiver status output held at ground. Unable to signal ready transceiver to processor B
INH 7 INH will not be able to perform system power enable functrion B
NC 8 This pin should be left floating or connected to ground D
WAKE 9 Will not be able to transition, which will not allow device to recognize a local wake up function B
VSUP 10 Device is unpowered B
NC 11 This pin should be left floating or pulled to ground D
CANL 12 Device cannot drive dominant to the bus, unable to communicate B
CANH 13 Device cannot drive dominant to the bus, unable to communicate B
nSLP 14 Processor will be unable to put the device into low-power sleep mode B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
TXD 1 GND Device will enter dominant time out mode. Unable to transmit data from processor to CAN bus B
GND 2 VFLT Internal power rail held to ground, which results in unpowered device and high ISUP current. No communication with device or CAN bus possible. B
VFLT 3 RXD RXD output biased recessive, unable to communication bus data to processor B
RXD 4 VIO RXD output biased recessive, unable to communication bus data to processor B
VIO 5 TS Transceiver status output held at VIO. Unable to signal ready transceiver to processor B
TS 6 INH Absolute maximum violation, pin may be damaged. Unable to communicate from transceiver status to processor A
NC 8 WAKE Absolute maximum violation on the NC pin, possible damage or unexpected behavior of device A
WAKE 9 VSUP Absolute maximum violation, WAKE pin may be damaged A
VSUP 10 nRST Absolute maximum violation, nRST pin may be damaged A
NC 11 CANL This pin should be left floating or pulled to ground. Potential for unexpected device behavior B
CANL 12 CANH Bus biased recessive, no communication possible. IOS current may be reached on CANH/CANL B
CANH 13 nSLP Device could be put to sleep when bus is recessive. No communication possible B
Table 4-5 Pin FMA for Device Pins Short-Circuited to VSUP supply
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
TXD 1 Absolute maximum violation, pin may be damaged. Unable to communicate from processor to CAN bus A
GND 2 Device unpowered, high ISUP current, may damage device A
VFLT 3 Absolute maximum violation, device may be damaged. A
RXD 4 Absolute maximum violation, pin may be damaged. Unable to communicate from CAN bus to processor A
VIO 5 Absolute maximum violation, pin may be damaged. A
TS 6 Absolute maximum violation, pin may be damaged. A
INH 7 INH will be biased on and will not be able to turn off B
NC 8 Absolute maximum violation on the NC pin, possible damage or unexpected behavior of device A
WAKE 9 Processor will be unable to toggle wake pin. No local wake possible. B
VSUP 10 None D
NC 11 Absolute maximum violation, pin may be damaged or unexpected behavior of device A
CANL 12 RXD biased recessive, no communication from CAN bus to processor possible. IOS current may be reached B
CANH 13 VO(REC) spec violated. May degrade EMC performance C
nSLP 14 Absolute maximum violation, pin may be damaged. A
Table 4-6 Pin FMA for Device Pins Short-Circuited to VIO supply
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
TXD 1 TXD will be held high, no communication from processor to CAN bus possible B
GND 2 Device unpowered, communication not possible B
VFLTR 3 Excessive current from internal rail, may enter thermal shutdown B
RXD 4 RXD will be held high, no communication from CAN bus to processor possible B
VIO 5 None D
TS 6 Held high, unable to signal transceiver state to processor B
INH 7 Absolute maximum violation, device may be damaged A
NC 8 Pin not held low or floating, possible unexpected behavior of device B
WAKE 9 Processor will be unable to toggle wake pin. No local wake possible B
VSUP 10 Absolute maximum violation, device may be damaged A
NC 11 Pin not held low or floating, possible unexpected behavior of device B
CANL 12 RXD biased recessive, no communication from CAN bus to processor possible. IOS current may be reached B
CANH 13 VO(REC) spec violated. May degrade EMC performance C
nSLP 14 Held high, unable to put device to sleep B