SFFS110 June   2021 TPS1663

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 VQFN Package
    2. 2.2 HTSSOP Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 VQFN Package
    2. 4.2 HTSSOP Package

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for TPS1663 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
OUT HIZ or no output 35%
OUT not in specification – voltage or timing 40%
IMON not in specification – current or timing 5%
PLIM not in specification – power or timing 5%
PGOOD/FLT fails to trip or false trip 5%
OUT stuck on 5%

Short circuit any two pins

 5%