SFFS016 May   2022 TPS62870-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS62870-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TPS62870-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS62870-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
COMP1The device does not power up and there is no output voltage.B
GOSNS2Normal operation, but output voltage accuracy gets worseC
VOSNS3Maximum duty cycle operation and no regulated output voltage. Output voltage follows the input voltage.B
EN4The device is disabled. Normal operationC
VIN5The device does not power up. No output voltageB
GND6Normal operationD
SW7Potential device damageA
GND8Normal operationD
VIN9The device does not power up and there is no output voltage.B
PG10Normal operation and loss of PG indicationB
MODE/SYNC11Normal operation and power save mode is enabled.C
SDA12Normal operation and no I2C communicationB
SCL13Normal operation and no I2C communicationB
SYNC_OUT14Potential device damageA
VSEL15Normal operation and defines start-up voltageC
FSEL16Normal operation and defines switching frequencyC
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
COMP 1 No loop compensation and can cause output voltage oscillating. Oscillation frequency cannot be predicted. B
GOSNS 2 No output voltage regulation and can cause output voltage oscillating. Oscillation frequency cannot be predicted. B
VOSNS 3 No output voltage regulation and can cause output voltage to oscillate. Oscillation frequency cannot be predicted. B
EN 4 Undetermined device operation. The device can power up and operate normal or stay turned off. B
VIN 5 Normal operation and pin 9 is still connected. C
GND 6 Normal operation. Pin 8 and the exposed thermal pad is still connected. C
SW 7 No output voltage B
GND 8 Normal operation. Pin 6 and the exposed thermal pad is still connected. C
VIN 9 Normal operation and pin 5 is still connected. C
PG 10 Normal operation and loss of PG indication. B
MODE/SYNC 11 Normal operation and the operation mode is undefined. B
SDA 12 Normal operation and no I2C communication B
SCL 13 Normal operation and no I2C communication B
SYNC_OUT 14 Normal operation D
VSEL 15 Normal operation and start-up voltage is undefined. B
FSEL 16 Normal operation and switching frequency is undefined. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
COMP12The device does not power up and there is no output voltage.B
GOSNS23Maximum duty cycle operation and there is no regulated output voltage. Output voltage follows the input voltage.B
VOSNS34The device does not power up or the device potentially gets damaged.A
EN45Potential device damageA
VIN56The device does not power up and there is no output voltage.B
GND67Potential device damageA
SW78Potential device damageA
GND89The device does not power up and there is no output voltage.B
VIN910Potential device damageA
PG1011Potential device damage if MODE/SYNC is tied high. Loss of PG indicationA
MODE/SYNC1112Potential device damage if MODE/SYNC is tied high. No I2C communicationA
SDA1213Normal operation and no I2C communicationB
SCL1314Potential device damageA
SYNC_OUT1415Potential device damage if VSEL is tied high or lowA
VSEL1516Normal operation. Defines start-up voltage and switching frequencyB
FSEL161No output voltage regulation. Can cause output voltage to oscillate. Oscillation frequency cannot be predicted.B
Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
COMP1Potential device damageA
GOSNS2Potential device damageA
VOSNS3The device will not start up. The output voltage will stay low or there is potential device damage.A
EN4Potential device damageA
VIN5Normal operationD
GND6The device does not power up and there is no output voltage.B
SW7Potential device damageA
GND8The device does not power up and there is no output voltage.B
VIN9Normal operationD
PG10Potential device damageA
MODE/SYNC11Normal operation and forced PWM operationC
SDA12Potential device damageA
SCL13Potential device damageA
SYNC_OUT14Potential device damageA
VSEL15Normal operation and defines start-up voltageC
FSEL16Normal operation and defines switching frequencyC