SDAA391 June   2026 TPS922050 , TPS922051 , TPS922052 , TPS922053 , TPS922054 , TPS922055

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2EN/PWM Timing Design to Avoid Repeated Soft-Start
    1. 2.1 TPS922050/1 Fast PWM Dimming Behavior
    2. 2.2 TPS922052/3/4/5 Fast PWM Dimming Behavior
    3. 2.3 Timing Design Guideline
    4. 2.4 Test Verification and Results
  6. 3Peripheral Circuit Parameter Optimization
    1. 3.1 Compensation Network
    2. 3.2 C O U T
  7. 4Summary
  8. 5References

Compensation Network

For a buck LED driver, the compensation network defines the dynamic response of the current regulation loop. A smaller C C O M P increases the theoretical loop bandwidth because the dominant compensation pole moves to a higher frequency. When R C O M P is used in series with C C O M P , the compensation zero is approximately:
Equation 1. f z = 1 2 π × R C O M P × C C O M P

Reducing C C O M P shifts the dominant compensation pole to a higher frequency and increases the loop gain in the low-to-mid-frequency range. As a result, the current regulation loop can achieve a higher crossover frequency and a faster transient response, provided that sufficient phase margin is maintained. Figure 3-2 and Table 3-1 show the simulation results. During PWM dimming turn-on, this faster response helps the LED current reach its target value more quickly, thereby reducing the LED-current rising time. However, a smaller C C O M P may increase the overshoot of LED current. Therefore, C C O M P should be selected by balancing dimming response speed, loop stability, peak LED current.

 Loop Simulation with Different
                    CCOMP Figure 3-2 Loop Simulation with Different CCOMP
Table 3-1 Effect of COUT on Rising Time and Peak Current
C C O M P (pF) Peak Current (A) Rising Time (us)
470 3.81 4.21
690 3.61 4.36
910 3.42 4.92
1000 3.29 6.11